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426 jermar 1 
/*
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 * Copyright (c) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup sparc64mm  
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 * @{
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 */
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/** @file
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 */
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#include <arch/mm/page.h>
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#include <arch/mm/pagesize.h>
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#include <arch/mm/sun4u/tlb.h>
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#include <arch/mm/sun4u/tlb.h>
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#include <genarch/mm/page_ht.h>
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#include <mm/frame.h>
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#include <arch/mm/frame.h>
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#include <bitops.h>
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#include <debug.h>
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#include <align.h>
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#include <config.h>
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#ifdef CONFIG_SMP
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/** Entries locked in DTLB of BSP.
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 *
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 * Application processors need to have the same locked entries in their DTLBs as
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 * the bootstrap processor.
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 */
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static struct {
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    uintptr_t virt_page;
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    uintptr_t phys_page;
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    int pagesize_code;
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} bsp_locked_dtlb_entry[DTLB_MAX_LOCKED_ENTRIES];
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/** Number of entries in bsp_locked_dtlb_entry array. */
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static count_t bsp_locked_dtlb_entries = 0;
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#endif /* CONFIG_SMP */
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/** Perform sparc64 specific initialization of paging. */
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void page_arch_init(void)
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{
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    if (config.cpu_active == 1) {
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        page_mapping_operations = &ht_mapping_operations;
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    } else {
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#ifdef CONFIG_SMP
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        unsigned int i;
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        /*
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         * Copy locked DTLB entries from the BSP.
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         */    
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        for (i = 0; i < bsp_locked_dtlb_entries; i++) {
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            dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
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                bsp_locked_dtlb_entry[i].phys_page,
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                bsp_locked_dtlb_entry[i].pagesize_code, true,
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                false);
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        }
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#endif 
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    }
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}
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/** Map memory-mapped device into virtual memory.
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 *
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 * So far, only DTLB is used to map devices into memory. Chances are that there
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 * will be only a limited amount of devices that the kernel itself needs to
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 * lock in DTLB.
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 *
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 * @param physaddr Physical address of the page where the device is located.
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 *  Must be at least page-aligned.
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 * @param size Size of the device's registers. Must not exceed 4M and must
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 *  include extra space caused by the alignment.
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 *
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 * @return Virtual address of the page where the device is mapped.
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 */
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uintptr_t hw_map(uintptr_t physaddr, size_t size)
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{
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    unsigned int order;
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    unsigned int i;
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    ASSERT(config.cpu_active == 1);
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    struct {
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        int pagesize_code;
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        size_t increment;
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        count_t count;
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    } sizemap[] = {
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        { PAGESIZE_8K, 0, 1 },              /* 8K */
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        { PAGESIZE_8K, MMU_PAGE_SIZE, 2 },      /* 16K */
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        { PAGESIZE_8K, MMU_PAGE_SIZE, 4 },      /* 32K */
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        { PAGESIZE_64K, 0, 1},              /* 64K */
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        { PAGESIZE_64K, 8 * MMU_PAGE_SIZE, 2 },     /* 128K */
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        { PAGESIZE_64K, 8 * MMU_PAGE_SIZE, 4 },     /* 256K */
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        { PAGESIZE_512K, 0, 1 },            /* 512K */
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        { PAGESIZE_512K, 64 * MMU_PAGE_SIZE, 2 },   /* 1M */
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        { PAGESIZE_512K, 64 * MMU_PAGE_SIZE, 4 },   /* 2M */
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        { PAGESIZE_4M, 0, 1 },              /* 4M */
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        { PAGESIZE_4M, 512 * MMU_PAGE_SIZE, 2 }     /* 8M */
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    };
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    ASSERT(ALIGN_UP(physaddr, MMU_PAGE_SIZE) == physaddr);
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    ASSERT(size <= 8 * 1024 * 1024);
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    if (size <= MMU_FRAME_SIZE)
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        order = 0;
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    else
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        order = (fnzb64(size - 1) + 1) - MMU_FRAME_WIDTH;
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    /*
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     * Use virtual addresses that are beyond the limit of physical memory.
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     * Thus, the physical address space will not be wasted by holes created
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     * by frame_alloc().
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     */
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    ASSERT(PA2KA(last_frame));
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    uintptr_t virtaddr = ALIGN_UP(PA2KA(last_frame),
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        1 << (order + FRAME_WIDTH));
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    last_frame = ALIGN_UP(KA2PA(virtaddr) + size,
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        1 << (order + FRAME_WIDTH));
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    for (i = 0; i < sizemap[order].count; i++) {
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        /*
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         * First, insert the mapping into DTLB.
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         */
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        dtlb_insert_mapping(virtaddr + i * sizemap[order].increment,
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            physaddr + i * sizemap[order].increment,
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            sizemap[order].pagesize_code, true, false);
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#ifdef CONFIG_SMP  
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        /*
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         * Second, save the information about the mapping for APs.
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         */
2015 jermar 156 
        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
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            virtaddr + i * sizemap[order].increment;
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        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
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            physaddr + i * sizemap[order].increment;
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        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
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            sizemap[order].pagesize_code;
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        bsp_locked_dtlb_entries++;
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#endif
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    }
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    return virtaddr;
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}
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1793 jermar 169 
/** @}
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 */
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