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664 jermar 1
/*
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup sparc64
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 * @{
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 */
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/** @file
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 */
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#include <arch/drivers/tick.h>
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#include <arch/interrupt.h>
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#include <arch/asm.h>
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#include <arch/register.h>
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#include <typedefs.h>
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#include <arch/cpu.h>
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#include <arch/boot/boot.h>
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#include <time/clock.h>
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#include <arch.h>
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#include <debug.h>
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#define TICK_RESTART_TIME   50  /* Worst case estimate. */
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/** Initialize tick interrupt. */
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void tick_init(void)
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{
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    tick_compare_reg_t compare;
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    interrupt_register(14, "tick_int", tick_interrupt);
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    compare.int_dis = false;
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    compare.tick_cmpr = CPU->arch.clock_frequency / HZ;
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    CPU->arch.next_tick_cmpr = compare.tick_cmpr;
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    tick_compare_write(compare.value);
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    tick_write(0);
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}
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/** Process tick interrupt.
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 *
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 * @param n Interrupt Level, 14,  (can be ignored)
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 * @param istate Interrupted state.
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 */
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void tick_interrupt(int n, istate_t *istate)
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{
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    softint_reg_t softint, clear;
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    uint64_t drift;
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    softint.value = softint_read();
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    /*
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     * Make sure we are servicing interrupt_level_14
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     */
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    ASSERT(n == 14);
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    /*
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     * Make sure we are servicing TICK_INT.
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     */
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    ASSERT(softint.tick_int);
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    /*
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     * Clear tick interrupt.
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     */
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    clear.value = 0;
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    clear.tick_int = 1;
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    clear_softint_write(clear.value);
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    /*
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     * Reprogram the compare register.
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     * For now, we can ignore the potential of the registers to overflow.
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     * On a 360MHz Ultra 60, the 63-bit compare counter will overflow in
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     * about 812 years. If there was a 2GHz UltraSPARC computer, it would
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     * overflow only in 146 years.
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     */
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    drift = tick_read() - CPU->arch.next_tick_cmpr;
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    while (drift > CPU->arch.clock_frequency / HZ) {
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        drift -= CPU->arch.clock_frequency / HZ;
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        CPU->missed_clock_ticks++;
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    }
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    CPU->arch.next_tick_cmpr = tick_read() + (CPU->arch.clock_frequency / HZ)
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        - drift;
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    tick_compare_write(CPU->arch.next_tick_cmpr);
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    clock();
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}
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/** @}
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 */