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3743 rimsky 1
/*
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 * Copyright (c) 2008 Pavel Rimsky
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup sparc64
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 * @{
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 */
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/**
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 * @file
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 * @brief   Macros, constants and functions needed to perform a call to the
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 *      hypervisor API. For details and terminology see this document:
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 *      UltraSPARC Virtual Machine Specification (The Hypervisor API
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 *      specification for Logical Domains).
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 *
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 */
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#ifndef KERN_sparc64_sun4v_HYPERCALL_H_
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#define KERN_sparc64_sun4v_HYPERCALL_H_
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/* SW trap numbers for hyperfast traps */
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#define FAST_TRAP       0x80
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#define MMU_MAP_ADDR        0x83
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#define MMU_UNMAP_ADDR      0x84
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/* function codes for fast traps */
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#define MACH_DESC       0x01
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#define CPU_START       0x10
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#define CPU_STOP        0x11
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#define CPU_YIELD       0x12
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#define CPU_MYID        0x16
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#define CPU_STATE       0x17
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#define CPU_SET_RTBA        0x18
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#define CPU_GET_RTBA        0x19
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#define MMU_TSB_CTX0        0x20
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#define MMU_TSB_CTXNON0     0x21
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#define MMU_DEMAP_PAGE      0x22
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#define MMU_DEMAP_CTX       0x23
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#define MMU_DEMAP_ALL       0x24
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#define MMU_MAP_PERM_ADDR   0x25
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#define MMU_FAULT_AREA_CONF 0x26
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#define MMU_ENABLE      0x27
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#define MMU_UNMAP_PERM_ADDR 0x28
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#define MMU_TSB_CTX0_INFO   0x29
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#define MMU_TSB_CTXNON0_INFO    0x2a
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#define MMU_FAULT_AREA_INFO 0x2b
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#define CPU_MONDO_SEND      0x42
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#define CONS_GETCHAR        0x60
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#define CONS_PUTCHAR        0x61
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/* return codes */
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#define EOK     0   /**< Successful return */
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#define ENOCPU      1   /**< Invalid CPU id */
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#define ENORADDR    2   /**< Invalid real address */
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#define ENOINTR     3   /**< Invalid interrupt id */
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#define EBADPGSZ    4   /**< Invalid pagesize encoding */
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#define EBADTSB     5   /**< Invalid TSB description */
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#define EINVAL      6   /**< Invalid argument */
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#define EBADTRAP    7   /**< Invalid function number */
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#define EBADALIGN   8   /**< Invalid address alignment */
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#define EWOULDBLOCK 9   /**< Cannot complete operation without blocking */
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#define ENOACCESS   10  /**< No access to specified resource */
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#define EIO     11  /**< I/O Error */
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#define ECPUERROR   12  /**< CPU is in error state */
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#define ENOTSUPPORTED   13  /**< Function not supported */
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#define ENOMAP      14  /**< No mapping found */
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#define ETOOMANY    15  /**< Too many items specified / limit reached */
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#define ECHANNEL    16  /**< Invalid LDC channel */
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#define EBUSY       17  /**< Operation failed as resource is otherwise busy */
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/**
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 * Performs a hyperfast hypervisor API call from the assembly language code.
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 * Expects the registers %o1-%o4 are properly filled with the arguments of the
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 * call.
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 *
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 * @param function_number   hyperfast call function number
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 */
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#define __HYPERCALL_FAST(function_number) \
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    set function_number, %o5; \
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    ta FAST_TRAP;
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/**
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 * Performs a fast hypervisor API call from the assembly language code.
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 * Expects the registers %o1-%o4 are properly filled with the arguments of the
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 * call.
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 *
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 * @param sw_trap_number    software trap number
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 */
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#define __HYPERCALL_HYPERFAST(sw_trap_number) \
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    ta (sw_trap_number);
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#ifndef __ASM__
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#include <typedefs.h>
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#include <arch/types.h>
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/*
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 * Macros to be used from the C-language code; __hypercall_fastN performs
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 * a fast hypervisor API call taking exactly N arguments.
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 */
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#define __hypercall_fast0(function_number) \
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    __hypercall_fast(0, 0, 0, 0, 0, function_number)
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#define __hypercall_fast1(function_number, p1) \
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    __hypercall_fast(p1, 0, 0, 0, 0, function_number)
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#define __hypercall_fast2(function_number, p1, p2) \
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    __hypercall_fast(p1, p2, 0, 0, 0, function_number)
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#define __hypercall_fast3(function_number, p1, p2, p3) \
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    __hypercall_fast(p1, p2, p3, 0, 0, function_number)
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#define __hypercall_fast4(function_number, p1, p2, p3, p4) \
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    __hypercall_fast(p1, p2, p3, p4, 0, function_number)
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#define __hypercall_fast5(function_number, p1, p2, p3, p4, p5) \
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    __hypercall_fast(p1, p2, p3, p4, p5, function_number)
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/**
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 * Performs a fast hypervisor API call which returns no value except for the
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 * error status.
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 *
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 * @param p1            the 1st argument of the hypervisor API call
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 * @param p2            the 2nd argument of the hypervisor API call
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 * @param p3            the 3rd argument of the hypervisor API call
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 * @param p4            the 4th argument of the hypervisor API call
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 * @param p5            the 5th argument of the hypervisor API call
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 * @param function_number   function number of the call
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 * @return          error status
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 */
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static inline uint64_t
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__hypercall_fast(const uint64_t p1, const uint64_t p2, const uint64_t p3,
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    const uint64_t p4, const uint64_t p5, const uint64_t function_number)
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{
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    register uint64_t a6 asm("o5") = function_number;
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    register uint64_t a1 asm("o0") = p1;
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    register uint64_t a2 asm("o1") = p2;
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    register uint64_t a3 asm("o2") = p3;
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    register uint64_t a4 asm("o3") = p4;
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    register uint64_t a5 asm("o4") = p5;
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    asm volatile (
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        "ta %7\n"
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        : "=r" (a1)
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        : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6),
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          "i" (FAST_TRAP)
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        : "memory"
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    );
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    return a1;
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}
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/**
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 * Performs a fast hypervisor API call which can return a value.
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 *
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 * @param p1            the 1st argument of the hypervisor API call
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 * @param p2            the 2nd argument of the hypervisor API call
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 * @param p3            the 3rd argument of the hypervisor API call
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 * @param p4            the 4th argument of the hypervisor API call
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 * @param p5            the 5th argument of the hypervisor API call
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 * @param function_number   function number of the call
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 * @param ret1          pointer to an address where the return value
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 *              of the hypercall should be saved, or NULL
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 * @return          error status
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 */
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static inline uint64_t
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__hypercall_fast_ret1(const uint64_t p1, const uint64_t p2, const uint64_t p3,
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    const uint64_t p4, const uint64_t p5, const uint64_t function_number,
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    uint64_t * const ret1)
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{
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    uint64_t errno = __hypercall_fast(p1, p2, p3, p4, p5, function_number);
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    if (ret1 != NULL) {
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        asm volatile ("mov %%o1, %0\n" : "=r" (*ret1));
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    }
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    return errno;
3770 rimsky 198
}
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/**
3743 rimsky 201
 * Performs a hyperfast hypervisor API call.
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 *
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 * @param p1            the 1st argument of the hypervisor API call
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 * @param p2            the 2nd argument of the hypervisor API call
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 * @param p3            the 3rd argument of the hypervisor API call
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 * @param p4            the 4th argument of the hypervisor API call
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 * @param p5            the 5th argument of the hypervisor API call
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 * @param sw_trap_number    software trap number
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 */
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static inline uint64_t
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__hypercall_hyperfast(const uint64_t p1, const uint64_t p2, const uint64_t p3,
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    const uint64_t p4, const uint64_t p5, const uint64_t sw_trap_number)
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{
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    register uint64_t a1 asm("o0") = p1;
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    register uint64_t a2 asm("o1") = p2;
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    register uint64_t a3 asm("o2") = p3;
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    register uint64_t a4 asm("o3") = p4;
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    register uint64_t a5 asm("o4") = p5;
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    asm volatile (
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        "ta %6\n"
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        : "=r" (a1)
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        : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5),
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          "i" (sw_trap_number)
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        : "memory"
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    );
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    return a1;
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}
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#endif /* ASM */
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#endif
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/** @}
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 */