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1 jermar 1
/*
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 * Copyright (c) 2003-2004 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup mips32 
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 * @{
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 */
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/** @file
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 */
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#include <arch/exception.h>
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#include <arch/interrupt.h>
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#include <arch/mm/tlb.h>
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#include <panic.h>
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#include <arch/cp0.h>
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#include <arch/types.h>
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#include <arch.h>
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#include <debug.h>
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#include <proc/thread.h>
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#include <symtab.h>
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#include <print.h>
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#include <interrupt.h>
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#include <func.h>
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#include <console/kconsole.h>
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#include <ddi/irq.h>
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#include <arch/debugger.h>
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static char * exctable[] = {
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    "Interrupt",
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    "TLB Modified",
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    "TLB Invalid",
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    "TLB Invalid Store",
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    "Address Error - load/instr. fetch",
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    "Address Error - store",
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    "Bus Error - fetch instruction",
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    "Bus Error - data reference",
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    "Syscall",
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    "BreakPoint",
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    "Reserved Instruction",
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    "Coprocessor Unusable",
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    "Arithmetic Overflow",
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    "Trap",
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    "Virtual Coherency - instruction",
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    "Floating Point",
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    NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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    "WatchHi/WatchLo", /* 23 */
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    NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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    "Virtual Coherency - data",
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};
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static void print_regdump(istate_t *istate)
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{
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    char *pcsymbol = "";
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    char *rasymbol = "";
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    char *s = get_symtab_entry(istate->epc);
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    if (s)
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        pcsymbol = s;
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    s = get_symtab_entry(istate->ra);
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    if (s)
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        rasymbol = s;
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    printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
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}
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static void unhandled_exception(int n, istate_t *istate)
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{
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    fault_if_from_uspace(istate, "unhandled exception %s", exctable[n]);
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    print_regdump(istate);
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    panic("unhandled exception %s\n", exctable[n]);
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}
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static void reserved_instr_exception(int n, istate_t *istate)
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{
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    if (*((uint32_t *)istate->epc) == 0x7c03e83b) {
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        ASSERT(THREAD);
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        istate->epc += 4;
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        istate->v1 = istate->k1;
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    } else
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        unhandled_exception(n, istate);
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}
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static void breakpoint_exception(int n, istate_t *istate)
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{
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#ifdef CONFIG_DEBUG
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    debugger_bpoint(istate);
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#else
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    /* it is necessary to not re-execute BREAK instruction after
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       returning from Exception handler
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       (see page 138 in R4000 Manual for more information) */
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    istate->epc += 4;
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#endif
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}
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static void tlbmod_exception(int n, istate_t *istate)
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{
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    tlb_modified(istate);
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}
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static void tlbinv_exception(int n, istate_t *istate)
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{
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    tlb_invalid(istate);
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}
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#ifdef CONFIG_FPU_LAZY
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static void cpuns_exception(int n, istate_t *istate)
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{
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    if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
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        scheduler_fpu_lazy_request();
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    else {
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        fault_if_from_uspace(istate, "unhandled Coprocessor Unusable Exception");
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        panic("unhandled Coprocessor Unusable Exception\n");
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    }
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}
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#endif
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static void interrupt_exception(int n, istate_t *istate)
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{
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    uint32_t cause;
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    int i;
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    /* decode interrupt number and process the interrupt */
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    cause = (cp0_cause_read() >> 8) &0xff;
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    for (i = 0; i < 8; i++) {
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        if (cause & (1 << i)) {
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            irq_t *irq = irq_dispatch_and_lock(i);
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            if (irq) {
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                /*
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                 * The IRQ handler was found.
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                 */
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                irq->handler(irq, irq->arg);
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                spinlock_unlock(&irq->lock);
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            } else {
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                /*
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                 * Spurious interrupt.
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                 */
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#ifdef CONFIG_DEBUG
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                printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, i);
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#endif
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            }
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        }
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    }
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}
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/** Handle syscall userspace call */
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static void syscall_exception(int n, istate_t *istate)
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{
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    panic("Syscall is handled through shortcut");
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}
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void exception_init(void)
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{
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    int i;
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    /* Clear exception table */
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    for (i = 0; i < IVT_ITEMS; i++)
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        exc_register(i, "undef", (iroutine) unhandled_exception);
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    exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
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    exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
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    exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
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    exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
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    exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
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    exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
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#ifdef CONFIG_FPU_LAZY
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    exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
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#endif
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    exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
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}
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/** @}
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 */