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1919 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2006 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup genericddi
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_IRQ_H_
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#define KERN_IRQ_H_
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typedef enum {
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    CMD_PIO_READ_8 = 1,
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    CMD_PIO_READ_16,
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    CMD_PIO_READ_32,
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    CMD_PIO_WRITE_8,
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    CMD_PIO_WRITE_16,
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    CMD_PIO_WRITE_32,
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    CMD_BTEST,
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    CMD_PREDICATE,
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    CMD_ACCEPT,
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    CMD_DECLINE,
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    CMD_LAST
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} irq_cmd_type;
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typedef struct {
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    irq_cmd_type cmd;
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    void *addr;
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    unsigned long long value;
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    unsigned int srcarg;
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    unsigned int dstarg;
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} irq_cmd_t;
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typedef struct {
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    unsigned int cmdcount;
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    irq_cmd_t *cmds;
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} irq_code_t;
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#ifdef KERNEL
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#include <arch/types.h>
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#include <adt/list.h>
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#include <adt/hash_table.h>
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#include <synch/spinlock.h>
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#include <proc/task.h>
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#include <ipc/ipc.h>
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typedef enum {
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    IRQ_DECLINE,        /**< Decline to service. */
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    IRQ_ACCEPT      /**< Accept to service. */
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} irq_ownership_t;
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typedef enum {
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    IRQ_TRIGGER_LEVEL = 1,
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    IRQ_TRIGGER_EDGE
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} irq_trigger_t;
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struct irq;
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typedef void (* irq_handler_t)(struct irq *);
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/** Type for function used to clear the interrupt. */
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typedef void (* cir_t)(void *, inr_t);
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/** IPC notification config structure.
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 *
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 * Primarily, this structure is encapsulated in the irq_t structure.
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 * It is protected by irq_t::lock.
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 */
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typedef struct {
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    /** When false, notifications are not sent. */
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    bool notify;
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    /** Answerbox for notifications. */
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    answerbox_t *answerbox;
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    /** Method to be used for the notification. */
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    unative_t method;
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    /** Arguments that will be sent if the IRQ is claimed. */
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    unative_t scratch[IPC_CALL_LEN];
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    /** Top-half pseudocode. */
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    irq_code_t *code;
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    /** Counter. */
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    count_t counter;
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    /**
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     * Link between IRQs that are notifying the same answerbox. The list is
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     * protected by the answerbox irq_lock.
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     */
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    link_t link;
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} ipc_notif_cfg_t;
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/** Structure representing one device IRQ.
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 *
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 * If one device has multiple interrupts, there will be multiple irq_t
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 * instantions with the same devno.
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 */
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typedef struct irq {
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    /** Hash table link. */
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    link_t link;
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    /** Lock protecting everything in this structure
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     *  except the link member. When both the IRQ
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     *  hash table lock and this lock are to be acquired,
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     *  this lock must not be taken first.
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     */
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    SPINLOCK_DECLARE(lock);
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    /** Send EOI before processing the interrupt.
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     *  This is essential for timer interrupt which
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     *  has to be acknowledged before doing preemption
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     *  to make sure another timer interrupt will
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     *  be eventually generated.
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     */
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    bool preack;
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    /** Unique device number. -1 if not yet assigned. */
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    devno_t devno;
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    /** Actual IRQ number. -1 if not yet assigned. */
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    inr_t inr;
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    /** Trigger level of the IRQ. */
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    irq_trigger_t trigger;
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    /** Claim ownership of the IRQ. */
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    irq_ownership_t (* claim)(struct irq *);
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    /** Handler for this IRQ and device. */
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    irq_handler_t handler;
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    /** Instance argument for the handler and the claim function. */
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    void *instance;
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    /** Clear interrupt routine. */
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    cir_t cir;
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    /** First argument to the clear interrupt routine. */
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    void *cir_arg;
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    /** Notification configuration structure. */
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    ipc_notif_cfg_t notif_cfg;
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} irq_t;
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SPINLOCK_EXTERN(irq_uspace_hash_table_lock);
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extern hash_table_t irq_uspace_hash_table;
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extern void irq_init(count_t, count_t);
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extern void irq_initialize(irq_t *);
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extern void irq_register(irq_t *);
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extern irq_t *irq_dispatch_and_lock(inr_t);
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#endif
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#endif
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/** @}
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 */