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1911 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2006 Jakub Jermar
1911 jermar 3
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup sparc64
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 * @{
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 */
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/**
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 * @file
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 * @brief   PCI driver.
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 */
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#include <arch/drivers/pci.h>
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#include <genarch/ofw/ofw_tree.h>
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#include <arch/trap/interrupt.h>
2089 decky 40
#include <mm/page.h>
1911 jermar 41
#include <mm/slab.h>
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#include <arch/types.h>
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#include <debug.h>
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#include <print.h>
4153 mejdrech 45
#include <string.h>
1911 jermar 46
#include <arch/asm.h>
4153 mejdrech 47
#include <sysinfo/sysinfo.h>
1911 jermar 48
 
4153 mejdrech 49
#define SABRE_INTERNAL_REG  0
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#define PSYCHO_INTERNAL_REG 2   
1911 jermar 51
 
4153 mejdrech 52
#define OBIO_IMR_BASE   0x200
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#define OBIO_IMR(ino)   (OBIO_IMR_BASE + ((ino) & INO_MASK))
1911 jermar 54
 
4153 mejdrech 55
#define OBIO_CIR_BASE   0x300
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#define OBIO_CIR(ino)   (OBIO_CIR_BASE + ((ino) & INO_MASK))
1984 jermar 57
 
4153 mejdrech 58
static void obio_enable_interrupt(pci_t *, int);
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static void obio_clear_interrupt(pci_t *, int);
1984 jermar 60
 
4153 mejdrech 61
static pci_t *pci_sabre_init(ofw_tree_node_t *);
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static pci_t *pci_psycho_init(ofw_tree_node_t *);
1911 jermar 63
 
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/** PCI operations for Sabre model. */
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static pci_operations_t pci_sabre_ops = {
4153 mejdrech 66
    .enable_interrupt = obio_enable_interrupt,
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    .clear_interrupt = obio_clear_interrupt
1911 jermar 68
};
1984 jermar 69
/** PCI operations for Psycho model. */
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static pci_operations_t pci_psycho_ops = {
4153 mejdrech 71
    .enable_interrupt = obio_enable_interrupt,
72
    .clear_interrupt = obio_clear_interrupt
1984 jermar 73
};
1911 jermar 74
 
1984 jermar 75
/** Initialize PCI controller (model Sabre).
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 *
4153 mejdrech 77
 * @param node      OpenFirmware device tree node of the Sabre.
1984 jermar 78
 *
4153 mejdrech 79
 * @return      Address of the initialized PCI structure.
1984 jermar 80
 */
1911 jermar 81
pci_t *pci_sabre_init(ofw_tree_node_t *node)
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{
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    pci_t *pci;
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    ofw_tree_property_t *prop;
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    /*
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     * Get registers.
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     */
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    prop = ofw_tree_getprop(node, "reg");
90
    if (!prop || !prop->value)
91
        return NULL;
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93
    ofw_upa_reg_t *reg = prop->value;
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    count_t regs = prop->size / sizeof(ofw_upa_reg_t);
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4153 mejdrech 96
    if (regs < SABRE_INTERNAL_REG + 1)
1911 jermar 97
        return NULL;
98
 
99
    uintptr_t paddr;
4153 mejdrech 100
    if (!ofw_upa_apply_ranges(node->parent, &reg[SABRE_INTERNAL_REG],
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        &paddr))
1911 jermar 102
        return NULL;
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104
    pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC);
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    if (!pci)
106
        return NULL;
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108
    pci->model = PCI_SABRE;
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    pci->op = &pci_sabre_ops;
4153 mejdrech 110
    pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size);
1911 jermar 111
 
4153 mejdrech 112
    /*
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     * Set sysinfo data needed by the uspace OBIO driver.
114
     */
115
    sysinfo_set_item_val("obio.base.physical", NULL, paddr);
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    sysinfo_set_item_val("kbd.cir.obio", NULL, 1);
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1911 jermar 118
    return pci;
119
}
120
 
1984 jermar 121
 
122
/** Initialize the Psycho PCI controller.
123
 *
4153 mejdrech 124
 * @param node      OpenFirmware device tree node of the Psycho.
1984 jermar 125
 *
4153 mejdrech 126
 * @return      Address of the initialized PCI structure.
1984 jermar 127
 */
128
pci_t *pci_psycho_init(ofw_tree_node_t *node)
129
{
130
    pci_t *pci;
131
    ofw_tree_property_t *prop;
132
 
133
    /*
134
     * Get registers.
135
     */
136
    prop = ofw_tree_getprop(node, "reg");
137
    if (!prop || !prop->value)
138
        return NULL;
139
 
140
    ofw_upa_reg_t *reg = prop->value;
141
    count_t regs = prop->size / sizeof(ofw_upa_reg_t);
142
 
4153 mejdrech 143
    if (regs < PSYCHO_INTERNAL_REG + 1)
1984 jermar 144
        return NULL;
145
 
146
    uintptr_t paddr;
4153 mejdrech 147
    if (!ofw_upa_apply_ranges(node->parent, &reg[PSYCHO_INTERNAL_REG],
148
        &paddr))
1984 jermar 149
        return NULL;
150
 
151
    pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC);
152
    if (!pci)
153
        return NULL;
154
 
155
    pci->model = PCI_PSYCHO;
156
    pci->op = &pci_psycho_ops;
4153 mejdrech 157
    pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size);
1984 jermar 158
 
4153 mejdrech 159
    /*
160
     * Set sysinfo data needed by the uspace OBIO driver.
161
     */
162
    sysinfo_set_item_val("obio.base.physical", NULL, paddr);
163
    sysinfo_set_item_val("kbd.cir.obio", NULL, 1);
164
 
1984 jermar 165
    return pci;
166
}
167
 
4153 mejdrech 168
void obio_enable_interrupt(pci_t *pci, int inr)
1911 jermar 169
{
4153 mejdrech 170
    pci->reg[OBIO_IMR(inr & INO_MASK)] |= IMAP_V_MASK;
1911 jermar 171
}
172
 
4153 mejdrech 173
void obio_clear_interrupt(pci_t *pci, int inr)
1911 jermar 174
{
4153 mejdrech 175
    pci->reg[OBIO_CIR(inr & INO_MASK)] = 0; /* set IDLE */
1911 jermar 176
}
177
 
178
/** Initialize PCI controller. */
179
pci_t *pci_init(ofw_tree_node_t *node)
180
{
181
    ofw_tree_property_t *prop;
182
 
183
    /*
184
     * First, verify this is a PCI node.
185
     */
186
    ASSERT(strcmp(ofw_tree_node_name(node), "pci") == 0);
187
 
188
    /*
189
     * Determine PCI controller model.
190
     */
191
    prop = ofw_tree_getprop(node, "model");
192
    if (!prop || !prop->value)
193
        return NULL;
194
 
195
    if (strcmp(prop->value, "SUNW,sabre") == 0) {
196
        /*
197
         * PCI controller Sabre.
198
         * This model is found on UltraSPARC IIi based machines.
199
         */
200
        return pci_sabre_init(node);
1984 jermar 201
    } else if (strcmp(prop->value, "SUNW,psycho") == 0) {
202
        /*
203
         * PCI controller Psycho.
204
         * Used on UltraSPARC II based processors, for instance,
205
         * on Ultra 60.
206
         */
207
        return pci_psycho_init(node);
1911 jermar 208
    } else {
209
        /*
210
         * Unsupported model.
211
         */
212
        printf("Unsupported PCI controller model (%s).\n", prop->value);
213
    }
214
 
215
    return NULL;
216
}
217
 
218
void pci_enable_interrupt(pci_t *pci, int inr)
219
{
220
    ASSERT(pci->op && pci->op->enable_interrupt);
221
    pci->op->enable_interrupt(pci, inr);
222
}
223
 
4153 mejdrech 224
void pci_clear_interrupt(void *pcip, int inr)
1911 jermar 225
{
4153 mejdrech 226
    pci_t *pci = (pci_t *)pcip;
227
 
1911 jermar 228
    ASSERT(pci->op && pci->op->clear_interrupt);
229
    pci->op->clear_interrupt(pci, inr);
230
}
231
 
232
/** @}
233
 */