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418 jermar 1
/*
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 * Copyright (c) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup sparc64
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_sparc64_ATOMIC_H_
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#define KERN_sparc64_ATOMIC_H_
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#include <arch/barrier.h>
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#include <arch/types.h>
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#include <preemption.h>
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/** Atomic add operation.
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 *
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 * Use atomic compare and swap operation to atomically add signed value.
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 *
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 * @param val Atomic variable.
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 * @param i Signed value to be added.
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 *
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 * @return Value of the atomic variable as it existed before addition.
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 */
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static inline long atomic_add(atomic_t *val, int i)
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{
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    uint64_t a, b;
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    do {
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        volatile uintptr_t x = (uint64_t) &val->count;
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        a = *((uint64_t *) x);
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        b = a + i;
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        asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *)x)),
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            "+r" (b) : "r" (a));
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    } while (a != b);
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    return a;
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}
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static inline long atomic_preinc(atomic_t *val)
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{
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    return atomic_add(val, 1) + 1;
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}
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static inline long atomic_postinc(atomic_t *val)
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{
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    return atomic_add(val, 1);
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}
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static inline long atomic_predec(atomic_t *val)
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{
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    return atomic_add(val, -1) - 1;
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}
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static inline long atomic_postdec(atomic_t *val)
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{
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    return atomic_add(val, -1);
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}
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static inline void atomic_inc(atomic_t *val)
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{
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    (void) atomic_add(val, 1);
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}
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static inline void atomic_dec(atomic_t *val)
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{
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    (void) atomic_add(val, -1);
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}
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static inline long test_and_set(atomic_t *val)
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{
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    uint64_t v = 1;
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    volatile uintptr_t x = (uint64_t) &val->count;
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    asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *) x)),
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        "+r" (v) : "r" (0));
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    return v;
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}
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static inline void atomic_lock_arch(atomic_t *val)
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{
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    uint64_t tmp1 = 1;
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    uint64_t tmp2 = 0;
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    volatile uintptr_t x = (uint64_t) &val->count;
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    preemption_disable();
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    asm volatile (
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    "0:\n"
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        "casx %0, %3, %1\n"
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        "brz %1, 2f\n"
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        "nop\n"
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    "1:\n"
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        "ldx %0, %2\n"
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        "brz %2, 0b\n"
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        "nop\n"
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        "ba %xcc, 1b\n"
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        "nop\n"
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    "2:\n"
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        : "+m" (*((uint64_t *) x)), "+r" (tmp1), "+r" (tmp2) : "r" (0)
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    );
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    /*
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     * Prevent critical section code from bleeding out this way up.
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     */
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    CS_ENTER_BARRIER();
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}
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#endif
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/** @}
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 */