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1 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2005 Jakub Jermar
1 jermar 3
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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4153 mejdrech 29
/** @addtogroup mips32mm
1702 cejka 30
 * @{
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 */
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/** @file
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 */
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3228 decky 35
#include <macros.h>
1 jermar 36
#include <arch/mm/frame.h>
3228 decky 37
#include <arch/mm/tlb.h>
3230 decky 38
#include <interrupt.h>
1 jermar 39
#include <mm/frame.h>
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#include <mm/asid.h>
368 jermar 41
#include <config.h>
3228 decky 42
#include <arch/drivers/msim.h>
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#include <print.h>
1 jermar 44
 
4153 mejdrech 45
#define ZERO_PAGE_MASK    TLB_PAGE_MASK_256K
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#define ZERO_FRAMES       2048
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#define ZERO_PAGE_WIDTH   18  /* 256K */
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#define ZERO_PAGE_SIZE    (1 << ZERO_PAGE_WIDTH)
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#define ZERO_PAGE_ASID    ASID_INVALID
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#define ZERO_PAGE_TLBI    0
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#define ZERO_PAGE_ADDR    0
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#define ZERO_PAGE_OFFSET  (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
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#define ZERO_PAGE_VALUE   (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
3228 decky 54
 
4153 mejdrech 55
#define ZERO_PAGE_VALUE_KSEG1(frame) \
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    (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
3236 decky 57
 
4153 mejdrech 58
#define MAX_REGIONS  32
3228 decky 59
 
60
typedef struct {
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    pfn_t start;
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    pfn_t count;
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} phys_region_t;
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4581 mejdrech 65
static size_t phys_regions_count = 0;
3228 decky 66
static phys_region_t phys_regions[MAX_REGIONS];
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68
/** Check whether frame is available
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 *
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 * Returns true if given frame is generally available for use.
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 * Returns false if given frame is used for physical memory
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 * mapped devices and cannot be used.
73
 *
74
 */
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static bool frame_available(pfn_t frame)
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{
4153 mejdrech 77
#ifdef MACHINE_msim
3228 decky 78
    /* MSIM device (dprinter) */
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    if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
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        return false;
81
 
82
    /* MSIM device (dkeyboard) */
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    if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
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        return false;
3236 decky 85
#endif
4153 mejdrech 86
 
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#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
3236 decky 88
    /* gxemul devices */
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    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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        0x10000000, MB2SIZE(256)))
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        return false;
92
#endif
3228 decky 93
 
94
    return true;
95
}
96
 
97
 
98
/** Check whether frame is safe to write
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 *
100
 * Returns true if given frame is safe for read/write test.
101
 * Returns false if given frame should not be touched.
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 *
103
 */
104
static bool frame_safe(pfn_t frame)
105
{
106
    /* Kernel structures */
107
    if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
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        return false;
109
 
110
    /* Kernel */
111
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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        KA2PA(config.base), config.kernel_size))
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        return false;
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115
    /* Kernel stack */
116
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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        KA2PA(config.stack_base), config.stack_size))
118
        return false;
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120
    /* Init tasks */
121
    bool safe = true;
4581 mejdrech 122
    size_t i;
3228 decky 123
    for (i = 0; i < init.cnt; i++)
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        if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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            KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
126
            safe = false;
127
            break;
128
        }
129
 
130
    return safe;
131
}
132
 
133
static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
134
{
135
    if (end_frame > start_frame) {
136
        /* Convert 1M frames to 16K frames */
137
        pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
3230 decky 138
        pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
3228 decky 139
 
140
        /* Interrupt vector frame is blacklisted */
141
        pfn_t conf_frame;
3232 decky 142
        if (first == 0)
3228 decky 143
            conf_frame = 1;
144
        else
145
            conf_frame = first;
146
 
147
        zone_create(first, count, conf_frame, 0);
148
 
149
        if (phys_regions_count < MAX_REGIONS) {
150
            phys_regions[phys_regions_count].start = first;
151
            phys_regions[phys_regions_count].count = count;
152
            phys_regions_count++;
153
        }
154
    }
155
}
156
 
157
 
573 palkovsky 158
/** Create memory zones
159
 *
3232 decky 160
 * Walk through available 256 KB chunks of physical
3228 decky 161
 * memory and create zones.
162
 *
3230 decky 163
 * Note: It is assumed that the TLB is not yet being
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 * used in any way, thus there is no interference.
165
 *
573 palkovsky 166
 */
1 jermar 167
void frame_arch_init(void)
168
{
3230 decky 169
    ipl_t ipl = interrupts_disable();
3228 decky 170
 
3230 decky 171
    /* Clear and initialize TLB */
172
    cp0_pagemask_write(ZERO_PAGE_MASK);
173
    cp0_entry_lo0_write(0);
174
    cp0_entry_lo1_write(0);
175
    cp0_entry_hi_write(0);
176
 
4581 mejdrech 177
    size_t i;
3230 decky 178
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
179
        cp0_index_write(i);
180
        tlbwi();
181
    }
3228 decky 182
 
183
    pfn_t start_frame = 0;
184
    pfn_t frame;
185
    bool avail = true;
186
 
187
    /* Walk through all 1 MB frames */
188
    for (frame = 0; frame < ZERO_FRAMES; frame++) {
189
        if (!frame_available(frame))
190
            avail = false;
191
        else {
192
            if (frame_safe(frame)) {
193
                entry_lo_t lo0;
194
                entry_lo_t lo1;
195
                entry_hi_t hi;
196
                tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
197
                tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
198
                tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
199
 
3230 decky 200
                cp0_pagemask_write(ZERO_PAGE_MASK);
3228 decky 201
                cp0_entry_lo0_write(lo0.value);
202
                cp0_entry_lo1_write(lo1.value);
203
                cp0_entry_hi_write(hi.value);
3230 decky 204
                cp0_index_write(ZERO_PAGE_TLBI);
3228 decky 205
                tlbwi();
206
 
207
                ZERO_PAGE_VALUE = 0;
208
                if (ZERO_PAGE_VALUE != 0)
209
                    avail = false;
210
                else {
211
                    ZERO_PAGE_VALUE = 0xdeadbeef;
212
                    if (ZERO_PAGE_VALUE != 0xdeadbeef)
213
                        avail = false;
4153 mejdrech 214
#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
3236 decky 215
                    else {
216
                        ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
217
                        if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
218
                            avail = false;
219
                    }
220
#endif
3228 decky 221
                }
222
            }
223
        }
224
 
225
        if (!avail) {
226
            frame_add_region(start_frame, frame);
227
            start_frame = frame + 1;
228
            avail = true;
229
        }
814 palkovsky 230
    }
3228 decky 231
 
232
    frame_add_region(start_frame, frame);
233
 
3230 decky 234
    /* Blacklist interrupt vector frame */
235
    frame_mark_unavailable(0, 1);
236
 
237
    /* Cleanup */
238
    cp0_pagemask_write(ZERO_PAGE_MASK);
239
    cp0_entry_lo0_write(0);
240
    cp0_entry_lo1_write(0);
241
    cp0_entry_hi_write(0);
3228 decky 242
    cp0_index_write(ZERO_PAGE_TLBI);
243
    tlbwi();
244
 
3230 decky 245
    interrupts_restore(ipl);
1 jermar 246
}
1702 cejka 247
 
3228 decky 248
 
249
void physmem_print(void)
250
{
251
    printf("Base       Size\n");
252
    printf("---------- ----------\n");
253
 
4581 mejdrech 254
    size_t i;
3228 decky 255
    for (i = 0; i < phys_regions_count; i++) {
3231 decky 256
        printf("%#010x %10u\n",
3228 decky 257
            PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
258
    }  
259
}
260
 
1776 jermar 261
/** @}
1702 cejka 262
 */