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418 jermar 1
#
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# Copyright (C) 2005 Jakub Jermar
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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1903 jermar 29
#include <arch/arch.h>
1789 jermar 30
#include <arch/regdef.h>
1823 jermar 31
#include <arch/boot/boot.h>
1917 jermar 32
#include <arch/stack.h>
846 jermar 33
 
1823 jermar 34
#include <arch/mm/mmu.h>
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#include <arch/mm/tlb.h>
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#include <arch/mm/tte.h>
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1903 jermar 38
#ifdef CONFIG_SMP
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#include <arch/context_offset.h>
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#endif
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426 jermar 42
.register %g2, #scratch
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.register %g3, #scratch
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418 jermar 45
.section K_TEXT_START, "ax"
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847 jermar 47
/*
1789 jermar 48
 * Here is where the kernel is passed control
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 * from the boot loader.
1790 jermar 50
 * 
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 * The registers are expected to be in this state:
1900 jermar 52
 * - %o0 non-zero for the bootstrap processor, zero for application/secondary processors
1899 jermar 53
 * - %o1 bootinfo structure address
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 * - %o2 bootinfo structure size
1792 jermar 55
 *
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 * Moreover, we depend on boot having established the
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 * following environment:
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 * - TLBs are on
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 * - identity mapping for the kernel image
847 jermar 60
 */
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418 jermar 62
.global kernel_image_start
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kernel_image_start:
1900 jermar 64
	mov %o0, %l7
846 jermar 65
 
1790 jermar 66
	/*
1823 jermar 67
	 * Setup basic runtime environment.
1790 jermar 68
	 */
424 jermar 69
 
1917 jermar 70
	wrpr %g0, NWINDOWS - 2, %cansave		! set maximum saveable windows
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	wrpr %g0, 0, %canrestore		! get rid of windows we will never need again
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	wrpr %g0, 0, %otherwin			! make sure the window state is consistent
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	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent needless clean_window traps for kernel
1823 jermar 74
 
1881 jermar 75
	wrpr %g0, 0, %tl			! TL = 0, primary context register is used
1823 jermar 76
 
1881 jermar 77
	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! Disable interrupts and disable 32-bit address masking.
1823 jermar 78
 
1881 jermar 79
	wrpr %g0, 0, %pil			! intialize %pil
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1790 jermar 81
	/*
1823 jermar 82
	 * Switch to kernel trap table.
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	 */
1880 jermar 84
	sethi %hi(trap_table), %g1
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	wrpr %g1, %lo(trap_table), %tba
1823 jermar 86
 
87
	/* 
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	 * Take over the DMMU by installing global locked
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	 * TTE entry identically mapping the first 4M
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	 * of memory.
1792 jermar 91
	 *
1823 jermar 92
	 * In case of DMMU, no FLUSH instructions need to be
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	 * issued. Because of that, the old DTLB contents can
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	 * be demapped pretty straightforwardly and without
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	 * causing any traps.
1792 jermar 96
	 */
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1823 jermar 98
	wr %g0, ASI_DMMU, %asi
895 jermar 99
 
1823 jermar 100
#define SET_TLB_DEMAP_CMD(r1, context_id) \
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	set (TLB_DEMAP_CONTEXT<<TLB_DEMAP_TYPE_SHIFT) | (context_id<<TLB_DEMAP_CONTEXT_SHIFT), %r1
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	! demap context 0
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	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
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	stxa %g0, [%g1] ASI_DMMU_DEMAP			
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	membar #Sync
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108
#define SET_TLB_TAG(r1, context) \
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	set VMA | (context<<TLB_TAG_ACCESS_CONTEXT_SHIFT), %r1
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111
	! write DTLB tag
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	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
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	stxa %g1, [VA_DMMU_TAG_ACCESS] %asi			
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	membar #Sync
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#define SET_TLB_DATA(r1, r2, imm) \
1887 jermar 117
	set TTE_CV | TTE_CP | TTE_P | LMA | imm, %r1; \
1823 jermar 118
	set PAGESIZE_4M, %r2; \
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	sllx %r2, TTE_SIZE_SHIFT, %r2; \
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	or %r1, %r2, %r1; \
1880 jermar 121
	mov 1, %r2; \
1823 jermar 122
	sllx %r2, TTE_V_SHIFT, %r2; \
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	or %r1, %r2, %r1;
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125
	! write DTLB data and install the kernel mapping
1887 jermar 126
	SET_TLB_DATA(g1, g2, TTE_L | TTE_W)	! use non-global mapping
1823 jermar 127
	stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG		
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	membar #Sync
1868 jermar 129
 
130
	/*
131
	 * Because we cannot use global mappings (because we want to
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	 * have separate 64-bit address spaces for both the kernel
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	 * and the userspace), we prepare the identity mapping also in
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	 * context 1. This step is required by the
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	 * code installing the ITLB mapping.
136
	 */
137
	! write DTLB tag of context 1 (i.e. MEM_CONTEXT_TEMP)
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	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
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	stxa %g1, [VA_DMMU_TAG_ACCESS] %asi			
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	membar #Sync
141
 
142
	! write DTLB data and install the kernel mapping in context 1
1887 jermar 143
	SET_TLB_DATA(g1, g2, TTE_W)			! use non-global mapping
1868 jermar 144
	stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG		
145
	membar #Sync
1823 jermar 146
 
147
	/*
148
	 * Now is time to take over the IMMU.
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	 * Unfortunatelly, it cannot be done as easily as the DMMU,
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	 * because the IMMU is mapping the code it executes.
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	 *
152
	 * [ Note that brave experiments with disabling the IMMU
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	 * and using the DMMU approach failed after a dozen
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	 * of desparate days with only little success. ]
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	 *
156
	 * The approach used here is inspired from OpenBSD.
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	 * First, the kernel creates IMMU mapping for itself
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	 * in context 1 (MEM_CONTEXT_TEMP) and switches to
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	 * it. Context 0 (MEM_CONTEXT_KERNEL) can be demapped
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	 * afterwards and replaced with the kernel permanent
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	 * mapping. Finally, the kernel switches back to
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	 * context 0 and demaps context 1.
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	 *
164
	 * Moreover, the IMMU requires use of the FLUSH instructions.
165
	 * But that is OK because we always use operands with
166
	 * addresses already mapped by the taken over DTLB.
167
	 */
168
 
1852 jermar 169
	set kernel_image_start, %g5
1823 jermar 170
 
171
	! write ITLB tag of context 1
172
	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
1880 jermar 173
	mov VA_DMMU_TAG_ACCESS, %g2
1823 jermar 174
	stxa %g1, [%g2] ASI_IMMU
1852 jermar 175
	flush %g5
1823 jermar 176
 
177
	! write ITLB data and install the temporary mapping in context 1
178
	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
179
	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG		
1852 jermar 180
	flush %g5
1823 jermar 181
 
182
	! switch to context 1
1880 jermar 183
	mov MEM_CONTEXT_TEMP, %g1
1823 jermar 184
	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
1852 jermar 185
	flush %g5
1823 jermar 186
 
187
	! demap context 0
188
	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
189
	stxa %g0, [%g1] ASI_IMMU_DEMAP			
1852 jermar 190
	flush %g5
1823 jermar 191
 
192
	! write ITLB tag of context 0
193
	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
1880 jermar 194
	mov VA_DMMU_TAG_ACCESS, %g2
1823 jermar 195
	stxa %g1, [%g2] ASI_IMMU
1852 jermar 196
	flush %g5
1823 jermar 197
 
198
	! write ITLB data and install the permanent kernel mapping in context 0
1887 jermar 199
	SET_TLB_DATA(g1, g2, TTE_L)		! use non-global mapping
1823 jermar 200
	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG		
1852 jermar 201
	flush %g5
1823 jermar 202
 
1906 jermar 203
	! enter nucleus - using context 0
1823 jermar 204
	wrpr %g0, 1, %tl
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206
	! demap context 1
207
	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)
208
	stxa %g0, [%g1] ASI_IMMU_DEMAP			
1852 jermar 209
	flush %g5
1823 jermar 210
 
211
	! set context 0 in the primary context register
212
	stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
1852 jermar 213
	flush %g5
1823 jermar 214
 
1906 jermar 215
	! leave nucleus - using primary context, i.e. context 0
1823 jermar 216
	wrpr %g0, 0, %tl
1864 jermar 217
 
1903 jermar 218
	brz %l7, 1f				! skip if you are not the bootstrap CPU
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	nop
1900 jermar 220
 
1917 jermar 221
	/*
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	 * So far, we have not touched the stack.
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	 * It is a good idead to set the kernel stack to a known state now.
224
	 */
225
	sethi %hi(temporary_boot_stack), %sp
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	or %sp, %lo(temporary_boot_stack), %sp
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	sub %sp, STACK_BIAS, %sp
228
 
1906 jermar 229
	sethi %hi(bootinfo), %o0
230
	call memcpy				! copy bootinfo
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	or %o0, %lo(bootinfo), %o0
232
 
1864 jermar 233
	call arch_pre_main
234
	nop
1823 jermar 235
 
426 jermar 236
	call main_bsp
237
	nop
238
 
239
	/* Not reached. */
240
 
1903 jermar 241
0:
242
	ba 0b
243
	nop
244
 
245
 
246
	/*
247
	 * Read MID from the processor.
248
	 */
249
1:
250
	ldxa [%g0] ASI_UPA_CONFIG, %g1
251
	srlx %g1, UPA_CONFIG_MID_SHIFT, %g1
252
	and %g1, UPA_CONFIG_MID_MASK, %g1
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1905 jermar 254
#ifdef CONFIG_SMP
1903 jermar 255
	/*
256
	 * Active loop for APs until the BSP picks them up.
257
	 * A processor cannot leave the loop until the
258
	 * global variable 'waking_up_mid' equals its
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	 * MID.
260
	 */
261
	set waking_up_mid, %g2
424 jermar 262
2:
1903 jermar 263
	ldx [%g2], %g3
264
	cmp %g3, %g1
265
	bne 2b
424 jermar 266
	nop
1903 jermar 267
 
268
	/*
269
	 * Configure stack for the AP.
270
	 * The AP is expected to use the stack saved
271
	 * in the ctx global variable.
272
	 */
273
	set ctx, %g1
274
	add %g1, OFFSET_SP, %g1
275
	ldx [%g1], %o6
276
 
277
	call main_ap
278
	nop
279
 
280
	/* Not reached. */
1905 jermar 281
#endif
1903 jermar 282
 
283
0:
284
	ba 0b
285
	nop
1917 jermar 286
 
287
 
288
.section K_DATA_START, "aw", @progbits
289
 
290
/*
291
 * Create small stack to be used by the bootstrap processor.
292
 * It is going to be used only for a very limited period of
293
 * time, but we switch to it anyway, just to be sure we are
294
 * properly initialized.
295
 *
296
 * What is important is that this piece of memory is covered
297
 * by the 4M DTLB locked entry and therefore there will be
298
 * no surprises like deadly combinations of spill trap and
299
 * and TLB miss on the stack address.
300
 */
301
 
302
#define INITIAL_STACK_SIZE	1024
303
 
304
.align STACK_ALIGNMENT
305
.space INITIAL_STACK_SIZE
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.align STACK_ALIGNMENT
307
temporary_boot_stack:
308
.space STACK_WINDOW_SAVE_AREA_SIZE