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756 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2006 Jakub Jermar
756 jermar 3
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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1860 jermar 29
/** @addtogroup sparc64mm
1702 cejka 30
 * @{
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 */
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/** @file
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 */
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756 jermar 35
#include <arch/mm/as.h>
1860 jermar 36
#include <arch/mm/tlb.h>
2089 decky 37
#include <genarch/mm/page_ht.h>
830 jermar 38
#include <genarch/mm/asid_fifo.h>
1890 jermar 39
#include <debug.h>
1903 jermar 40
#include <config.h>
756 jermar 41
 
1890 jermar 42
#ifdef CONFIG_TSB
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#include <arch/mm/tsb.h>
1891 jermar 44
#include <arch/memstr.h>
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#include <arch/asm.h>
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#include <mm/frame.h>
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#include <bitops.h>
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#include <macros.h>
2009 jermar 49
#endif /* CONFIG_TSB */
1890 jermar 50
 
756 jermar 51
/** Architecture dependent address space init. */
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void as_arch_init(void)
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{
1903 jermar 54
    if (config.cpu_active == 1) {
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        as_operations = &as_ht_operations;
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        asid_fifo_init();
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    }
756 jermar 58
}
1702 cejka 59
 
1891 jermar 60
int as_constructor_arch(as_t *as, int flags)
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{
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#ifdef CONFIG_TSB
2144 jermar 63
    /*
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     * The order must be calculated with respect to the emulated
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     * 16K page size.
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     */
2048 jermar 67
    int order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
2144 jermar 68
        sizeof(tsb_entry_t)) >> FRAME_WIDTH);
2272 jermar 69
 
1987 jermar 70
    uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA);
1891 jermar 71
 
72
    if (!tsb)
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        return -1;
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75
    as->arch.itsb = (tsb_entry_t *) tsb;
2048 jermar 76
    as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT *
2144 jermar 77
        sizeof(tsb_entry_t));
2272 jermar 78
 
3153 svoboda 79
    memsetb(as->arch.itsb,
2141 jermar 80
        (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * sizeof(tsb_entry_t), 0);
1891 jermar 81
#endif
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    return 0;
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}
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85
int as_destructor_arch(as_t *as)
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{
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#ifdef CONFIG_TSB
2144 jermar 88
    /*
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     * The count must be calculated with respect to the emualted 16K page
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     * size.
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     */
4691 svoboda 92
    size_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) *
2144 jermar 93
        sizeof(tsb_entry_t)) >> FRAME_WIDTH;
1987 jermar 94
    frame_free(KA2PA((uintptr_t) as->arch.itsb));
1891 jermar 95
    return cnt;
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#else
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    return 0;
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#endif
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}
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101
int as_create_arch(as_t *as, int flags)
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{
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#ifdef CONFIG_TSB
4691 svoboda 104
    tsb_invalidate(as, 0, (size_t) -1);
1891 jermar 105
#endif
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    return 0;
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}
108
 
2048 jermar 109
/** Perform sparc64-specific tasks when an address space becomes active on the
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 * processor.
1890 jermar 111
 *
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 * Install ASID and map TSBs.
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 *
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 * @param as Address space.
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 */
1860 jermar 116
void as_install_arch(as_t *as)
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{
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    tlb_context_reg_t ctx;
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120
    /*
2170 jermar 121
     * Note that we don't and may not lock the address space. That's ok
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     * since we only read members that are currently read-only.
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     *
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     * Moreover, the as->asid is protected by asidlock, which is being held.
1890 jermar 125
     */
126
 
127
    /*
2170 jermar 128
     * Write ASID to secondary context register. The primary context
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     * register has to be set from TL>0 so it will be filled from the
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     * secondary context register from the TL=1 code just before switch to
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     * userspace.
1860 jermar 132
     */
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    ctx.v = 0;
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    ctx.context = as->asid;
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    mmu_secondary_context_write(ctx.v);
1890 jermar 136
 
137
#ifdef CONFIG_TSB   
1891 jermar 138
    uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
1890 jermar 139
 
1891 jermar 140
    ASSERT(as->arch.itsb && as->arch.dtsb);
1890 jermar 141
 
1891 jermar 142
    uintptr_t tsb = (uintptr_t) as->arch.itsb;
1890 jermar 143
 
2141 jermar 144
    if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
1890 jermar 145
        /*
1891 jermar 146
         * TSBs were allocated from memory not covered
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         * by the locked 4M kernel DTLB entry. We need
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         * to map both TSBs explicitly.
1890 jermar 149
         */
1891 jermar 150
        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
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        dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
152
    }
1890 jermar 153
 
1891 jermar 154
    /*
155
     * Setup TSB Base registers.
156
     */
157
    tsb_base_reg_t tsb_base;
158
 
159
    tsb_base.value = 0;
160
    tsb_base.size = TSB_SIZE;
161
    tsb_base.split = 0;
1890 jermar 162
 
2141 jermar 163
    tsb_base.base = ((uintptr_t) as->arch.itsb) >> MMU_PAGE_WIDTH;
1891 jermar 164
    itsb_base_write(tsb_base.value);
2141 jermar 165
    tsb_base.base = ((uintptr_t) as->arch.dtsb) >> MMU_PAGE_WIDTH;
1891 jermar 166
    dtsb_base_write(tsb_base.value);
3674 svoboda 167
 
168
#if defined (US3)
169
    /*
170
     * Clear the extension registers.
171
     * In HelenOS, primary and secondary context registers contain
172
     * equal values and kernel misses (context 0, ie. the nucleus context)
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     * are excluded from the TSB miss handler, so it makes no sense
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     * to have separate TSBs for primary, secondary and nucleus contexts.
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     * Clearing the extension registers will ensure that the value of the
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     * TSB Base register will be used as an address of TSB, making the code
177
     * compatible with the US port.
178
     */
179
    itsb_primary_extension_write(0);
180
    itsb_nucleus_extension_write(0);
181
    dtsb_primary_extension_write(0);
182
    dtsb_secondary_extension_write(0);
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    dtsb_nucleus_extension_write(0);
1890 jermar 184
#endif
3674 svoboda 185
#endif
1860 jermar 186
}
187
 
2048 jermar 188
/** Perform sparc64-specific tasks when an address space is removed from the
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 * processor.
1890 jermar 190
 *
191
 * Demap TSBs.
192
 *
193
 * @param as Address space.
194
 */
195
void as_deinstall_arch(as_t *as)
196
{
197
 
198
    /*
2170 jermar 199
     * Note that we don't and may not lock the address space. That's ok
200
     * since we only read members that are currently read-only.
201
     *
202
     * Moreover, the as->asid is protected by asidlock, which is being held.
1890 jermar 203
     */
204
 
205
#ifdef CONFIG_TSB
1891 jermar 206
    uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
1890 jermar 207
 
1891 jermar 208
    ASSERT(as->arch.itsb && as->arch.dtsb);
1890 jermar 209
 
1891 jermar 210
    uintptr_t tsb = (uintptr_t) as->arch.itsb;
1890 jermar 211
 
2141 jermar 212
    if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
1891 jermar 213
        /*
214
         * TSBs were allocated from memory not covered
215
         * by the locked 4M kernel DTLB entry. We need
216
         * to demap the entry installed by as_install_arch().
217
         */
218
        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
1890 jermar 219
    }
220
#endif
221
}
222
 
1860 jermar 223
/** @}
1702 cejka 224
 */