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35 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2005 - 2006 Jakub Jermar
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 * Copyright (c) 2006 Jakub Vana
35 jermar 4
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia64mm 
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_ia64_PAGE_H_
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#define KERN_ia64_PAGE_H_
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967 palkovsky 39
#include <arch/mm/frame.h>
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#define PAGE_SIZE   FRAME_SIZE
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#define PAGE_WIDTH  FRAME_WIDTH
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967 palkovsky 44
#ifdef KERNEL
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/** Bit width of the TLB-locked portion of kernel address space. */
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#define KERNEL_PAGE_WIDTH       28  /* 256M */
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#define IO_PAGE_WIDTH           26  /* 64M */
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#define FW_PAGE_WIDTH           28  /* 256M */
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3588 svoboda 51
/** Staticly mapped IO spaces */
2726 vana 52
 
3588 svoboda 53
/* Firmware area (bellow 4GB in phys mem) */
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#define FW_OFFSET             0x00000000F0000000
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/* Legacy IO space */
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#define IO_OFFSET             0x0001000000000000
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/* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000*/
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#define VIO_OFFSET            0x0002000000000000
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749 jermar 63
#define PPN_SHIFT           12
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#define VRN_SHIFT           61
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#define VRN_MASK            (7LL << VRN_SHIFT)
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#define VA2VRN(va)          ((va)>>VRN_SHIFT)
869 vana 68
 
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#ifdef __ASM__
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#define VRN_KERNEL          7
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#else
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#define VRN_KERNEL          7LL
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#endif
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747 jermar 75
#define REGION_REGISTERS        8
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#define KA2PA(x)    ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT)))
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#define PA2KA(x)    ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT)))
869 vana 79
 
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#define VHPT_WIDTH          20  /* 1M */
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#define VHPT_SIZE           (1 << VHPT_WIDTH)
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#define PTA_BASE_SHIFT          15
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749 jermar 85
/** Memory Attributes. */
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#define MA_WRITEBACK    0x0
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#define MA_UNCACHEABLE  0x4
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/** Privilege Levels. Only the most and the least privileged ones are ever used. */
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#define PL_KERNEL   0x0
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#define PL_USER     0x3
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/* Access Rigths. Only certain combinations are used by the kernel. */
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#define AR_READ     0x0
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#define AR_EXECUTE  0x1
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#define AR_WRITE    0x2
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901 jermar 98
#ifndef __ASM__
818 vana 99
 
2089 decky 100
#include <arch/mm/as.h>
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#include <arch/mm/frame.h>
2089 decky 102
#include <arch/interrupt.h>
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#include <arch/barrier.h>
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#include <arch/mm/asid.h>
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#include <arch/types.h>
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#include <debug.h>
818 vana 107
 
747 jermar 108
struct vhpt_tag_info {
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    unsigned long long tag : 63;
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    unsigned ti : 1;
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} __attribute__ ((packed));
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747 jermar 113
union vhpt_tag {
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    struct vhpt_tag_info tag_info;
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    unsigned tag_word;
710 vana 116
};
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747 jermar 118
struct vhpt_entry_present {
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    /* Word 0 */
747 jermar 120
    unsigned p : 1;
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    unsigned : 1;
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    unsigned ma : 3;
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    unsigned a : 1;
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    unsigned d : 1;
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    unsigned pl : 2;
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    unsigned ar : 3;
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    unsigned long long ppn : 38;
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    unsigned : 2;
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    unsigned ed : 1;
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    unsigned ig1 : 11;
710 vana 131
 
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    /* Word 1 */
747 jermar 133
    unsigned : 2;
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    unsigned ps : 6;
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    unsigned key : 24;
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    unsigned : 32;
710 vana 137
 
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    /* Word 2 */
747 jermar 139
    union vhpt_tag tag;
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710 vana 141
    /* Word 3 */                                                   
1780 jermar 142
    uint64_t ig3 : 64;
747 jermar 143
} __attribute__ ((packed));
710 vana 144
 
747 jermar 145
struct vhpt_entry_not_present {
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    /* Word 0 */
747 jermar 147
    unsigned p : 1;
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    unsigned long long ig0 : 52;
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    unsigned ig1 : 11;
710 vana 150
 
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    /* Word 1 */
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    unsigned : 2;
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    unsigned ps : 6;
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    unsigned long long ig2 : 56;
710 vana 155
 
747 jermar 156
    /* Word 2 */
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    union vhpt_tag tag;
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    /* Word 3 */                                                   
1780 jermar 160
    uint64_t ig3 : 64;
747 jermar 161
} __attribute__ ((packed));
710 vana 162
 
747 jermar 163
typedef union vhpt_entry {
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    struct vhpt_entry_present present;
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    struct vhpt_entry_not_present not_present;
1780 jermar 166
    uint64_t word[4];
792 jermar 167
} vhpt_entry_t;
710 vana 168
 
747 jermar 169
struct region_register_map {
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    unsigned ve : 1;
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    unsigned : 1;
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    unsigned ps : 6;
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    unsigned rid : 24;
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    unsigned : 32;
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} __attribute__ ((packed));
684 jermar 176
 
747 jermar 177
typedef union region_register {
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    struct region_register_map map;
179
    unsigned long long word;
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} region_register;
715 vana 181
 
747 jermar 182
struct pta_register_map {
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    unsigned ve : 1;
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    unsigned : 1;
185
    unsigned size : 6;
186
    unsigned vf : 1;
187
    unsigned : 6;
188
    unsigned long long base : 49;
189
} __attribute__ ((packed));
190
 
191
typedef union pta_register {
192
    struct pta_register_map map;
1780 jermar 193
    uint64_t word;
747 jermar 194
} pta_register;
195
 
196
/** Return Translation Hashed Entry Address.
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 *
198
 * VRN bits are used to read RID (ASID) from one
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 * of the eight region registers registers.
200
 *
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 * @param va Virtual address including VRN bits.
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 *
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 * @return Address of the head of VHPT collision chain.
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 */
1780 jermar 205
static inline uint64_t thash(uint64_t va)
715 vana 206
{
1780 jermar 207
    uint64_t ret;
715 vana 208
 
2082 decky 209
    asm volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
715 vana 210
 
747 jermar 211
    return ret;
212
}
213
 
214
/** Return Translation Hashed Entry Tag.
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 *
216
 * VRN bits are used to read RID (ASID) from one
217
 * of the eight region registers.
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 *
219
 * @param va Virtual address including VRN bits.
220
 *
221
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
222
 */
1780 jermar 223
static inline uint64_t ttag(uint64_t va)
715 vana 224
{
1780 jermar 225
    uint64_t ret;
715 vana 226
 
2082 decky 227
    asm volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
747 jermar 228
 
229
    return ret;
230
}
231
 
232
/** Read Region Register.
233
 *
234
 * @param i Region register index.
235
 *
236
 * @return Current contents of rr[i].
237
 */
1780 jermar 238
static inline uint64_t rr_read(index_t i)
715 vana 239
{
1780 jermar 240
    uint64_t ret;
748 jermar 241
    ASSERT(i < REGION_REGISTERS);
2082 decky 242
    asm volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
747 jermar 243
    return ret;
244
}
715 vana 245
 
747 jermar 246
/** Write Region Register.
247
 *
248
 * @param i Region register index.
249
 * @param v Value to be written to rr[i].
250
 */
1780 jermar 251
static inline void rr_write(index_t i, uint64_t v)
715 vana 252
{
748 jermar 253
    ASSERT(i < REGION_REGISTERS);
2082 decky 254
    asm volatile (
901 jermar 255
        "mov rr[%0] = %1\n"
256
        :
257
        : "r" (i << VRN_SHIFT), "r" (v)
258
    );
747 jermar 259
}
260
 
261
/** Read Page Table Register.
262
 *
263
 * @return Current value stored in PTA.
264
 */
1780 jermar 265
static inline uint64_t pta_read(void)
747 jermar 266
{
1780 jermar 267
    uint64_t ret;
747 jermar 268
 
2082 decky 269
    asm volatile ("mov %0 = cr.pta\n" : "=r" (ret));
747 jermar 270
 
271
    return ret;
272
}
715 vana 273
 
747 jermar 274
/** Write Page Table Register.
275
 *
276
 * @param v New value to be stored in PTA.
277
 */
1780 jermar 278
static inline void pta_write(uint64_t v)
747 jermar 279
{
2082 decky 280
    asm volatile ("mov cr.pta = %0\n" : : "r" (v));
747 jermar 281
}
715 vana 282
 
747 jermar 283
extern void page_arch_init(void);
284
 
1780 jermar 285
extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid);
286
extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v);
287
extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags);
792 jermar 288
 
967 palkovsky 289
#endif /* __ASM__ */
869 vana 290
 
967 palkovsky 291
#endif /* KERNEL */
292
 
869 vana 293
#endif
1702 cejka 294
 
1780 jermar 295
/** @}
1702 cejka 296
 */