Subversion Repositories HelenOS

Rev

Rev 3153 | Rev 4346 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
178 palkovsky 1
/*
2701 jermar 2
 * Copyright (c) 2008 Jakub Jermar
2071 jermar 3
 * Copyright (c) 2005-2006 Ondrej Palkovsky
178 palkovsky 4
 * All rights reserved.
5
 *
6
 * Redistribution and use in source and binary forms, with or without
7
 * modification, are permitted provided that the following conditions
8
 * are met:
9
 *
10
 * - Redistributions of source code must retain the above copyright
11
 *   notice, this list of conditions and the following disclaimer.
12
 * - Redistributions in binary form must reproduce the above copyright
13
 *   notice, this list of conditions and the following disclaimer in the
14
 *   documentation and/or other materials provided with the distribution.
15
 * - The name of the author may not be used to endorse or promote products
16
 *   derived from this software without specific prior written permission.
17
 *
18
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
 */
29
 
1888 jermar 30
/** @addtogroup amd64  
1702 cejka 31
 * @{
32
 */
33
/** @file
34
 */
35
 
2227 decky 36
#include <arch.h>
178 palkovsky 37
#include <arch/pm.h>
206 palkovsky 38
#include <arch/asm.h>
1252 palkovsky 39
#include <mm/as.h>
2089 decky 40
#include <mm/frame.h>
206 palkovsky 41
#include <memstr.h>
814 palkovsky 42
#include <mm/slab.h>
206 palkovsky 43
 
178 palkovsky 44
/*
45
 * There is no segmentation in long mode so we set up flat mode. In this
46
 * mode, we use, for each privilege level, two segments spanning the
47
 * whole memory. One is for code and one is for data.
48
 */
49
 
1187 jermar 50
descriptor_t gdt[GDT_ITEMS] = {
178 palkovsky 51
    /* NULL descriptor */
52
    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
53
    /* KTEXT descriptor */
54
    { .limit_0_15  = 0xffff,
55
      .base_0_15   = 0,
56
      .base_16_23  = 0,
2701 jermar 57
      .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
178 palkovsky 58
      .limit_16_19 = 0xf,
59
      .available   = 0,
60
      .longmode    = 1,
188 palkovsky 61
      .special     = 0,
178 palkovsky 62
      .granularity = 1,
63
      .base_24_31  = 0 },
64
    /* KDATA descriptor */
65
    { .limit_0_15  = 0xffff,
66
      .base_0_15   = 0,
67
      .base_16_23  = 0,
68
      .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_KERNEL,
69
      .limit_16_19 = 0xf,
70
      .available   = 0,
71
      .longmode    = 0,
72
      .special     = 0,
188 palkovsky 73
      .granularity = 1,
178 palkovsky 74
      .base_24_31  = 0 },
803 palkovsky 75
    /* UDATA descriptor */
178 palkovsky 76
    { .limit_0_15  = 0xffff,
77
      .base_0_15   = 0,
78
      .base_16_23  = 0,
803 palkovsky 79
      .access      = AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER,
178 palkovsky 80
      .limit_16_19 = 0xf,
81
      .available   = 0,
803 palkovsky 82
      .longmode    = 0,
83
      .special     = 1,
206 palkovsky 84
      .granularity = 1,
178 palkovsky 85
      .base_24_31  = 0 },
803 palkovsky 86
    /* UTEXT descriptor */
178 palkovsky 87
    { .limit_0_15  = 0xffff,
88
      .base_0_15   = 0,
89
      .base_16_23  = 0,
803 palkovsky 90
      .access      = AR_PRESENT | AR_CODE | DPL_USER,
178 palkovsky 91
      .limit_16_19 = 0xf,
92
      .available   = 0,
803 palkovsky 93
      .longmode    = 1,
94
      .special     = 0,
178 palkovsky 95
      .granularity = 1,
96
      .base_24_31  = 0 },
332 palkovsky 97
    /* KTEXT 32-bit protected, for protected mode before long mode */
188 palkovsky 98
    { .limit_0_15  = 0xffff,
99
      .base_0_15   = 0,
100
      .base_16_23  = 0,
101
      .access      = AR_PRESENT | AR_CODE | DPL_KERNEL | AR_READABLE,
102
      .limit_16_19 = 0xf,
103
      .available   = 0,
104
      .longmode    = 0,
277 palkovsky 105
      .special     = 1,
188 palkovsky 106
      .granularity = 1,
107
      .base_24_31  = 0 },
206 palkovsky 108
    /* TSS descriptor - set up will be completed later,
109
     * on AMD64 it is 64-bit - 2 items in table */
110
    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
1289 vana 111
    { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
112
    /* VESA Init descriptor */
1292 vana 113
#ifdef CONFIG_FB    
2701 jermar 114
    { 0xffff, 0, VESA_INIT_SEGMENT >> 12, AR_PRESENT | AR_CODE | DPL_KERNEL,
115
      0xf, 0, 0, 0, 0, 0
116
    }
1292 vana 117
#endif
178 palkovsky 118
};
119
 
1187 jermar 120
idescriptor_t idt[IDT_ITEMS];
178 palkovsky 121
 
2701 jermar 122
ptr_16_64_t gdtr = {.limit = sizeof(gdt), .base = (uint64_t) gdt };
123
ptr_16_64_t idtr = {.limit = sizeof(idt), .base = (uint64_t) idt };
229 palkovsky 124
 
1187 jermar 125
static tss_t tss;
126
tss_t *tss_p = NULL;
178 palkovsky 127
 
1780 jermar 128
void gdt_tss_setbase(descriptor_t *d, uintptr_t base)
206 palkovsky 129
{
1187 jermar 130
    tss_descriptor_t *td = (tss_descriptor_t *) d;
206 palkovsky 131
 
132
    td->base_0_15 = base & 0xffff;
133
    td->base_16_23 = ((base) >> 16) & 0xff;
134
    td->base_24_31 = ((base) >> 24) & 0xff;
135
    td->base_32_63 = ((base) >> 32);
136
}
137
 
1780 jermar 138
void gdt_tss_setlimit(descriptor_t *d, uint32_t limit)
206 palkovsky 139
{
1187 jermar 140
    struct tss_descriptor *td = (tss_descriptor_t *) d;
206 palkovsky 141
 
142
    td->limit_0_15 = limit & 0xffff;
143
    td->limit_16_19 = (limit >> 16) & 0xf;
144
}
145
 
1780 jermar 146
void idt_setoffset(idescriptor_t *d, uintptr_t offset)
206 palkovsky 147
{
148
    /*
149
     * Offset is a linear address.
150
     */
151
    d->offset_0_15 = offset & 0xffff;
152
    d->offset_16_31 = offset >> 16 & 0xffff;
153
    d->offset_32_63 = offset >> 32;
154
}
155
 
1187 jermar 156
void tss_initialize(tss_t *t)
206 palkovsky 157
{
3153 svoboda 158
    memsetb(t, sizeof(tss_t), 0);
206 palkovsky 159
}
160
 
161
/*
162
 * This function takes care of proper setup of IDT and IDTR.
163
 */
164
void idt_init(void)
165
{
1187 jermar 166
    idescriptor_t *d;
206 palkovsky 167
    int i;
168
 
169
    for (i = 0; i < IDT_ITEMS; i++) {
170
        d = &idt[i];
171
 
172
        d->unused = 0;
211 palkovsky 173
        d->selector = gdtselector(KTEXT_DES);
206 palkovsky 174
 
175
        d->present = 1;
176
        d->type = AR_INTERRUPT; /* masking interrupt */
177
 
2701 jermar 178
        idt_setoffset(d, ((uintptr_t) interrupt_handlers) +
179
            i * interrupt_handler_size);
206 palkovsky 180
    }
181
}
182
 
799 palkovsky 183
/** Initialize segmentation - code/data/idt tables
184
 *
185
 */
206 palkovsky 186
void pm_init(void)
187
{
1187 jermar 188
    descriptor_t *gdt_p = (struct descriptor *) gdtr.base;
189
    tss_descriptor_t *tss_desc;
206 palkovsky 190
 
191
    /*
192
     * Each CPU has its private GDT and TSS.
193
     * All CPUs share one IDT.
194
     */
195
 
196
    if (config.cpu_active == 1) {
197
        idt_init();
198
        /*
199
         * NOTE: bootstrap CPU has statically allocated TSS, because
200
         * the heap hasn't been initialized so far.
201
         */
202
        tss_p = &tss;
203
    }
204
    else {
1252 palkovsky 205
        /* We are going to use malloc, which may return
206
         * non boot-mapped pointer, initialize the CR3 register
207
         * ahead of page_init */
2106 jermar 208
        write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
1252 palkovsky 209
 
1187 jermar 210
        tss_p = (struct tss *) malloc(sizeof(tss_t), FRAME_ATOMIC);
206 palkovsky 211
        if (!tss_p)
4339 svoboda 212
            panic("Cannot allocate TSS.");
206 palkovsky 213
    }
214
 
215
    tss_initialize(tss_p);
216
 
1187 jermar 217
    tss_desc = (tss_descriptor_t *) (&gdt_p[TSS_DES]);
208 palkovsky 218
    tss_desc->present = 1;
219
    tss_desc->type = AR_TSS;
220
    tss_desc->dpl = PL_KERNEL;
206 palkovsky 221
 
1780 jermar 222
    gdt_tss_setbase(&gdt_p[TSS_DES], (uintptr_t) tss_p);
1251 jermar 223
    gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
206 palkovsky 224
 
1186 jermar 225
    gdtr_load(&gdtr);
226
    idtr_load(&idtr);
206 palkovsky 227
    /*
228
     * As of this moment, the current CPU has its own GDT pointing
229
     * to its own TSS. We just need to load the TR register.
230
     */
1186 jermar 231
    tr_load(gdtselector(TSS_DES));
206 palkovsky 232
}
1702 cejka 233
 
2227 decky 234
/* Reboot the machine by initiating
235
 * a triple fault
236
 */
237
void arch_reboot(void)
238
{
239
    preemption_disable();
240
    ipl_t ipl = interrupts_disable();
241
 
3153 svoboda 242
    memsetb(idt, sizeof(idt), 0);
2227 decky 243
    idtr_load(&idtr);
244
 
245
    interrupts_restore(ipl);
246
    asm volatile (
247
        "int $0x03\n"
2233 decky 248
        "cli\n"
2227 decky 249
        "hlt\n"
250
    );
251
}
252
 
1888 jermar 253
/** @}
1702 cejka 254
 */