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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4221 | trochtova | 1 | #include <unistd.h> |
| 2 | #include <ddi.h> |
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| 3 | #include <libarch/ddi.h> |
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| 4 | #include <stdio.h> |
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| 5 | |||
| 6 | #include "internal.h" |
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| 7 | |||
| 8 | /* physical addresses and offsets */ |
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| 4242 | trochtova | 9 | //#define U2P_BASE 0x1FE00000000 |
| 10 | #define U2P_BASE 0x1ca00000000 |
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| 4221 | trochtova | 11 | #define PCI_CONF_OFFSET 0x001000000 |
| 12 | #define PCI_CONF_SIZE 0x001000000 |
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| 13 | #define PCI_CONF_BASE (U2P_BASE + PCI_CONF_OFFSET) |
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| 14 | |||
| 15 | /* virtual address of PCI configuration space */ |
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| 16 | static void *conf_addr = 0; |
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| 17 | |||
| 18 | /* |
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| 19 | * virtual address of specified PCI configuration register: |
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| 20 | * bus ... bus number (0 for top level PCI bus B, 1 for top level PCI bus A) |
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| 21 | * dev ... device number (0 - 15) |
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| 22 | * fn ... function number (0 - 7) |
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| 23 | * reg ... register number (register's position within PCI configuration header) |
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| 24 | **/ |
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| 4242 | trochtova | 25 | #define CONF_ADDR(bus, dev, fn, reg) ((void *)(conf_addr + ((bus << 16) | (dev << 11) | (fn << 8) | (reg << 0)))) |
| 4221 | trochtova | 26 | |
| 27 | |||
| 4242 | trochtova | 28 | |
| 4221 | trochtova | 29 | static void us2i_init(struct pci_access *a) |
| 30 | { |
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| 31 | } |
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| 32 | |||
| 33 | static void us2i_cleanup(struct pci_access *a UNUSED) |
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| 34 | { |
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| 35 | } |
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| 36 | |||
| 4242 | trochtova | 37 | static inline uint64_t pio_read_64(uint64_t *port) |
| 4221 | trochtova | 38 | { |
| 4242 | trochtova | 39 | uint64_t rv; |
| 40 | |||
| 41 | rv = *port; |
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| 42 | memory_barrier(); |
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| 43 | |||
| 44 | return rv; |
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| 45 | } |
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| 46 | |||
| 47 | |||
| 48 | // read whole 8-byte blocks |
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| 49 | static void us2i_read_aligned(int bus, int dev, int fn, int pos, byte * buf, int len) |
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| 50 | { |
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| 51 | uint64_t aux; |
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| 4221 | trochtova | 52 | |
| 4242 | trochtova | 53 | int offset = pos % 8; |
| 54 | int aligned_pos = pos - offset; |
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| 55 | |||
| 56 | if (len + offset > 8) { |
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| 57 | len = 8 - offset; |
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| 58 | } |
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| 59 | |||
| 60 | void *addr = CONF_ADDR(bus, dev, fn, aligned_pos); |
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| 61 | aux = pio_read_64(addr); |
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| 62 | |||
| 63 | int i; |
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| 64 | for (i = 0; i < len; i++) { |
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| 65 | buf[i] = ((byte *)(&aux))[offset + i]; |
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| 66 | } |
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| 67 | } |
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| 68 | |||
| 69 | static int us2i_detect(struct pci_access *a) |
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| 70 | { |
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| 4221 | trochtova | 71 | /* |
| 72 | * Gain control over PCI configuration ports. |
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| 73 | */ |
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| 74 | if (pio_enable((void *)PCI_CONF_BASE, PCI_CONF_SIZE, &conf_addr)) { |
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| 75 | return 0; |
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| 4242 | trochtova | 76 | } |
| 4221 | trochtova | 77 | |
| 4242 | trochtova | 78 | u16 vendor_id, device_id; |
| 79 | us2i_read_aligned(0, 0, 0, PCI_VENDOR_ID, &vendor_id, 2); |
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| 80 | vendor_id = cpu_to_le16(vendor_id); |
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| 81 | us2i_read_aligned(0, 0, 0, PCI_DEVICE_ID, &device_id, 2); |
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| 82 | device_id = cpu_to_le16(device_id); |
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| 83 | |||
| 84 | //int vendor_id = le16_to_cpu(pio_read_16(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID))); |
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| 85 | //int device_id = le16_to_cpu(pio_read_16(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID))); |
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| 86 | //int vendor_id = pio_read_8(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID)); |
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| 87 | //vendor_id = vendor_id + pio_read_8(CONF_ADDR(0, 0, 0, PCI_VENDOR_ID + 1)) << 8; |
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| 88 | //int device_id = pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID)); |
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| 89 | //device_id = device_id | pio_read_8(CONF_ADDR(0, 0, 0, PCI_DEVICE_ID + 1)) << 8; |
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| 4221 | trochtova | 90 | |
| 4242 | trochtova | 91 | printf("PCI: vendor id = %x\n", vendor_id); |
| 92 | printf("PCI: device id = %x\n", device_id); |
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| 4221 | trochtova | 93 | |
| 4242 | trochtova | 94 | // return vendor_id == 0x108E && device_id == 0x8000; // should be Psycho from Sun Microsystems ??? |
| 95 | //return vendor_id == 0x108E /*&& device_id == 0x1000*/; // should be Psycho from Sun Microsystems |
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| 96 | return 1; |
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| 4221 | trochtova | 97 | } |
| 98 | |||
| 99 | static int us2i_read(struct pci_dev *d, int pos, byte * buf, int len) |
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| 100 | { |
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| 4242 | trochtova | 101 | void * addr = CONF_ADDR(d->bus, d->dev, d->func, pos); |
| 102 | |||
| 4221 | trochtova | 103 | if (pos >= 256) |
| 104 | return 0; |
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| 105 | |||
| 106 | switch (len) { |
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| 107 | case 1: |
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| 4242 | trochtova | 108 | us2i_read_aligned(d->bus, d->dev, d->func, pos, buf, len); |
| 109 | break; |
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| 110 | case 2: |
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| 111 | us2i_read_aligned(d->bus, d->dev, d->func, pos, buf, len); |
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| 112 | ((u16 *) buf)[0] = cpu_to_le16(*((u16 *) buf)); |
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| 113 | break; |
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| 114 | case 4: |
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| 115 | us2i_read_aligned(d->bus, d->dev, d->func, pos, buf, len); |
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| 116 | ((u32 *) buf)[0] = cpu_to_le32(*((u32 *) buf)); |
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| 117 | break; |
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| 118 | default: |
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| 119 | return pci_generic_block_read(d, pos, buf, len); |
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| 120 | } |
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| 121 | return 1; |
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| 122 | |||
| 123 | /* |
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| 124 | void * addr = CONF_ADDR(d->bus, d->dev, d->func, pos); |
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| 125 | |||
| 126 | if (pos >= 256) |
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| 127 | return 0; |
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| 128 | |||
| 129 | switch (len) { |
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| 130 | case 1: |
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| 131 | buf[0] = pio_read_8(addr); |
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| 132 | break; |
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| 133 | case 2: |
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| 134 | ((u16 *) buf)[0] = cpu_to_le16(pio_read_16(addr)); |
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| 135 | break; |
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| 136 | case 4: |
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| 137 | ((u32 *) buf)[0] = cpu_to_le32(pio_read_32(addr)); |
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| 138 | break; |
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| 139 | default: |
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| 140 | return pci_generic_block_read(d, pos, buf, len); |
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| 141 | } |
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| 142 | return 1; */ |
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| 143 | |||
| 144 | /*if (pos >= 256) |
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| 145 | return 0; |
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| 146 | |||
| 147 | switch (len) { |
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| 148 | case 1: |
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| 4221 | trochtova | 149 | buf[0] = pio_read_8(CONF_ADDR(d->bus, d->dev, d->func, pos)); |
| 150 | break; |
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| 151 | case 2: |
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| 152 | us2i_read(d, pos + 1, buf, 1); // unlike PCI, sparc uses big endian |
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| 153 | us2i_read(d, pos, buf + 1, 1); |
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| 154 | break; |
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| 155 | case 4: |
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| 156 | us2i_read(d, pos + 3, buf, 1); // endians in an ugly way ... FIX ME |
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| 157 | us2i_read(d, pos + 2, buf + 1, 1); |
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| 158 | us2i_read(d, pos + 1, buf + 2, 1); |
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| 159 | us2i_read(d, pos, buf + 3, 1); |
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| 160 | break; |
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| 161 | default: |
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| 162 | return pci_generic_block_read(d, pos, buf, len); |
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| 163 | } |
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| 4242 | trochtova | 164 | return 1;*/ |
| 4221 | trochtova | 165 | } |
| 166 | |||
| 167 | static int us2i_write(struct pci_dev *d, int pos, byte * buf, int len) |
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| 168 | { |
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| 4242 | trochtova | 169 | void * addr = CONF_ADDR(d->bus, d->dev, d->func, pos); |
| 170 | |||
| 4221 | trochtova | 171 | if (pos >= 256) |
| 172 | return 0; |
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| 173 | |||
| 174 | switch (len) { |
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| 175 | case 1: |
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| 176 | pio_write_8(CONF_ADDR(d->bus, d->dev, d->func, pos), buf[0]); |
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| 177 | break; |
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| 178 | case 2: |
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| 4242 | trochtova | 179 | pio_write_16(addr, le16_to_cpu(((u16 *) buf)[0])); |
| 4221 | trochtova | 180 | break; |
| 181 | case 4: |
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| 4242 | trochtova | 182 | pio_write_32(addr, le32_to_cpu(((u32 *) buf)[0])); |
| 4221 | trochtova | 183 | break; |
| 184 | default: |
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| 185 | return pci_generic_block_write(d, pos, buf, len); |
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| 186 | } |
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| 187 | return 1; |
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| 188 | } |
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| 189 | |||
| 190 | |||
| 191 | struct pci_methods pm_us2i = { |
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| 192 | "Ultra Sparc IIi", |
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| 193 | NULL, /* config */ |
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| 194 | us2i_detect, |
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| 195 | us2i_init, |
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| 196 | us2i_cleanup, |
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| 197 | pci_generic_scan, |
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| 198 | pci_generic_fill_info, |
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| 199 | us2i_read, |
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| 200 | us2i_write, |
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| 201 | NULL, /* init_dev */ |
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| 202 | NULL /* cleanup_dev */ |
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| 203 | }; |