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2235 stepan 1
/*
2179 stepan 2
 * Copyright (c) 2007 Petr Stepan
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
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 * are met:
8
 *
9
 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
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29
/** @addtogroup arm32
30
 * @{
31
 */
32
/** @file
2410 stepan 33
 *  @brief Exception handlers and exception initialization routines.
2179 stepan 34
 */
35
 
36
#include <arch/exception.h>
2326 kebrt 37
#include <arch/debug/print.h>
2179 stepan 38
#include <arch/memstr.h>
2235 stepan 39
#include <arch/regutils.h>
40
#include <interrupt.h>
2306 kebrt 41
#include <arch/machine.h>
2282 jancik 42
#include <arch/mm/page_fault.h>
4055 trochtova 43
#include <arch/barrier.h>
2284 stepan 44
#include <print.h>
2286 stepan 45
#include <syscall/syscall.h>
2179 stepan 46
 
2407 stepan 47
/** Offset used in calculation of exception handler's relative address.
48
 *
49
 * @see install_handler()
50
 */
51
#define PREFETCH_OFFSET      0x8
2329 kebrt 52
 
2407 stepan 53
/** LDR instruction's code */
2306 kebrt 54
#define LDR_OPCODE           0xe59ff000
2179 stepan 55
 
2407 stepan 56
/** Number of exception vectors. */
57
#define EXC_VECTORS          8
2329 kebrt 58
 
2407 stepan 59
/** Size of memory block occupied by exception vectors. */
60
#define EXC_VECTORS_SIZE     (EXC_VECTORS * 4)
61
 
2355 stepan 62
/** Switches to kernel stack and saves all registers there.
63
 *
64
 * Temporary exception stack is used to save a few registers
65
 * before stack switch takes place.
4055 trochtova 66
 *
2355 stepan 67
 */
2284 stepan 68
inline static void setup_stack_and_save_regs()
69
{
4055 trochtova 70
    asm volatile (
71
        "ldr r13, =exc_stack\n"
72
        "stmfd r13!, {r0}\n"
73
        "mrs r0, spsr\n"
74
        "and r0, r0, #0x1f\n"
75
        "cmp r0, #0x10\n"
76
        "bne 1f\n"
77
 
2464 jermar 78
        /* prev mode was usermode */
4055 trochtova 79
        "ldmfd r13!, {r0}\n"
80
        "ldr r13, =supervisor_sp\n"
81
        "ldr r13, [r13]\n"
82
        "stmfd r13!, {lr}\n"
83
        "stmfd r13!, {r0-r12}\n"
84
        "stmfd r13!, {r13, lr}^\n"
85
        "mrs r0, spsr\n"
86
        "stmfd r13!, {r0}\n"
87
        "b 2f\n"
88
 
2464 jermar 89
        /* mode was not usermode */
4055 trochtova 90
        "1:\n"
91
            "stmfd r13!, {r1, r2, r3}\n"
92
            "mrs r1, cpsr\n"
93
            "mov r2, lr\n"
94
            "bic r1, r1, #0x1f\n"
95
            "orr r1, r1, r0\n"
96
            "mrs r0, cpsr\n"
97
            "msr cpsr_c, r1\n"
98
 
99
            "mov r3, r13\n"
100
            "stmfd r13!, {r2}\n"
101
            "mov r2, lr\n"
102
            "stmfd r13!, {r4-r12}\n"
103
            "mov r1, r13\n"
104
 
105
            /* the following two lines are for debugging */
106
            "mov sp, #0\n"
107
            "mov lr, #0\n"
108
            "msr cpsr_c, r0\n"
109
 
110
            "ldmfd r13!, {r4, r5, r6, r7}\n"
111
            "stmfd r1!, {r4, r5, r6}\n"
112
            "stmfd r1!, {r7}\n"
113
            "stmfd r1!, {r2}\n"
114
            "stmfd r1!, {r3}\n"
115
            "mrs r0, spsr\n"
116
            "stmfd r1!, {r0}\n"
117
            "mov r13, r1\n"
118
 
119
        "2:\n"
2464 jermar 120
    );
2284 stepan 121
}
122
 
2355 stepan 123
/** Returns from exception mode.
124
 *
125
 * Previously saved state of registers (including control register)
126
 * is restored from the stack.
127
 */
2284 stepan 128
inline static void load_regs()
129
{
2464 jermar 130
    asm volatile(
131
        "ldmfd r13!, {r0}       \n"
132
        "msr spsr, r0           \n"
133
        "and r0, r0, #0x1f      \n"
134
        "cmp r0, #0x10          \n"
135
        "bne 1f             \n"
136
 
137
        /* return to user mode */
138
        "ldmfd r13!, {r13, lr}^     \n"
139
        "b 2f               \n"
140
 
141
        /* return to non-user mode */
142
    "1:\n"
143
        "ldmfd r13!, {r1, r2}       \n"
144
        "mrs r3, cpsr           \n"
145
        "bic r3, r3, #0x1f      \n"
146
        "orr r3, r3, r0         \n"
147
        "mrs r0, cpsr           \n"
148
        "msr cpsr_c, r3         \n"
149
 
150
        "mov r13, r1            \n"
151
        "mov lr, r2         \n"
152
        "msr cpsr_c, r0         \n"
153
 
154
        /* actual return */
155
    "2:\n"
156
        "ldmfd r13, {r0-r12, pc}^\n"
157
    );
2284 stepan 158
}
159
 
2411 stepan 160
 
2407 stepan 161
/** Switch CPU to mode in which interrupts are serviced (currently it
162
 * is Undefined mode).
163
 *
164
 * The default mode for interrupt servicing (Interrupt Mode)
165
 * can not be used because of nested interrupts (which can occur
2464 jermar 166
 * because interrupts are enabled in higher levels of interrupt handler).
2407 stepan 167
 */
2414 kebrt 168
inline static void switch_to_irq_servicing_mode()
2407 stepan 169
{
170
    /* switch to Undefined mode */
171
    asm volatile(
172
        /* save regs used during switching */
173
        "stmfd sp!, {r0-r3}     \n"
174
 
175
        /* save stack pointer and link register to r1, r2 */
176
        "mov r1, sp         \n"
177
        "mov r2, lr         \n"
178
 
179
        /* mode switch */
180
        "mrs r0, cpsr           \n"
181
        "bic r0, r0, #0x1f      \n"
182
        "orr r0, r0, #0x1b      \n"
183
        "msr cpsr_c, r0         \n"
184
 
185
        /* restore saved sp and lr */
186
        "mov sp, r1         \n"
187
        "mov lr, r2         \n"
188
 
189
        /* restore original regs */
190
        "ldmfd sp!, {r0-r3}     \n"
191
    );
192
}
193
 
2355 stepan 194
/** Calls exception dispatch routine. */
4055 trochtova 195
#define CALL_EXC_DISPATCH(exception) \
196
    asm volatile ( \
197
        "mov r0, %[exc]\n" \
198
        "mov r1, r13\n" \
199
        "bl exc_dispatch\n" \
200
        :: [exc] "i" (exception) \
201
    );\
2235 stepan 202
 
203
/** General exception handler.
2355 stepan 204
 *
2235 stepan 205
 *  Stores registers, dispatches the exception,
206
 *  and finally restores registers and returns from exception processing.
2329 kebrt 207
 *
208
 *  @param exception Exception number.
2235 stepan 209
 */
4055 trochtova 210
#define PROCESS_EXCEPTION(exception) \
211
    setup_stack_and_save_regs(); \
212
    CALL_EXC_DISPATCH(exception) \
2284 stepan 213
    load_regs();
2235 stepan 214
 
215
/** Updates specified exception vector to jump to given handler.
2355 stepan 216
 *
2329 kebrt 217
 *  Addresses of handlers are stored in memory following exception vectors.
2235 stepan 218
 */
4055 trochtova 219
static void install_handler(unsigned handler_addr, unsigned *vector)
2235 stepan 220
{
221
    /* relative address (related to exc. vector) of the word
222
     * where handler's address is stored
223
    */
2611 jermar 224
    volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE -
225
        PREFETCH_OFFSET;
2179 stepan 226
 
2235 stepan 227
    /* make it LDR instruction and store at exception vector */
228
    *vector = handler_address_ptr | LDR_OPCODE;
4055 trochtova 229
    smc_coherence(*vector);
2179 stepan 230
 
2235 stepan 231
    /* store handler's address */
232
    *(vector + EXC_VECTORS) = handler_addr;
2284 stepan 233
 
2179 stepan 234
}
235
 
2329 kebrt 236
/** Low-level Reset Exception handler. */
4055 trochtova 237
static void reset_exception_entry(void)
2235 stepan 238
{
239
    PROCESS_EXCEPTION(EXC_RESET);
2179 stepan 240
}
241
 
2329 kebrt 242
/** Low-level Software Interrupt Exception handler. */
4055 trochtova 243
static void swi_exception_entry(void)
2235 stepan 244
{
245
    PROCESS_EXCEPTION(EXC_SWI);
2179 stepan 246
}
247
 
2329 kebrt 248
/** Low-level Undefined Instruction Exception handler. */
4055 trochtova 249
static void undef_instr_exception_entry(void)
2235 stepan 250
{
251
    PROCESS_EXCEPTION(EXC_UNDEF_INSTR);
252
}
253
 
2329 kebrt 254
/** Low-level Fast Interrupt Exception handler. */
4055 trochtova 255
static void fiq_exception_entry(void)
2235 stepan 256
{
257
    PROCESS_EXCEPTION(EXC_FIQ);
258
}
259
 
2329 kebrt 260
/** Low-level Prefetch Abort Exception handler. */
4055 trochtova 261
static void prefetch_abort_exception_entry(void)
2235 stepan 262
{
263
    asm("sub lr, lr, #4");
264
    PROCESS_EXCEPTION(EXC_PREFETCH_ABORT);
265
}
266
 
2329 kebrt 267
/** Low-level Data Abort Exception handler. */
4055 trochtova 268
static void data_abort_exception_entry(void)
2235 stepan 269
{
270
    asm("sub lr, lr, #8");
271
    PROCESS_EXCEPTION(EXC_DATA_ABORT);
272
}
273
 
2355 stepan 274
/** Low-level Interrupt Exception handler.
275
 *
276
 * CPU is switched to Undefined mode before further interrupt processing
277
 * because of possible occurence of nested interrupt exception, which
278
 * would overwrite (and thus spoil) stack pointer.
279
 */
4055 trochtova 280
static void irq_exception_entry(void)
2235 stepan 281
{
282
    asm("sub lr, lr, #4");
2344 stepan 283
    setup_stack_and_save_regs();
2407 stepan 284
 
2414 kebrt 285
    switch_to_irq_servicing_mode();
2407 stepan 286
 
2344 stepan 287
    CALL_EXC_DISPATCH(EXC_IRQ)
288
 
289
    load_regs();
2235 stepan 290
}
291
 
2286 stepan 292
/** Software Interrupt handler.
293
 *
294
 * Dispatches the syscall.
295
 */
2304 kebrt 296
static void swi_exception(int exc_no, istate_t *istate)
2284 stepan 297
{
2464 jermar 298
    istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,
2611 jermar 299
        istate->r3, istate->r4, istate->r5, istate->r6);
2284 stepan 300
}
301
 
2235 stepan 302
/** Interrupt Exception handler.
2286 stepan 303
 *
2464 jermar 304
 * Determines the sources of interrupt and calls their handlers.
2235 stepan 305
 */
2304 kebrt 306
static void irq_exception(int exc_no, istate_t *istate)
2235 stepan 307
{
2306 kebrt 308
    machine_irq_exception(exc_no, istate);
2235 stepan 309
}
310
 
2329 kebrt 311
/** Fills exception vectors with appropriate exception handlers. */
2235 stepan 312
void install_exception_handlers(void)
313
{
2464 jermar 314
    install_handler((unsigned) reset_exception_entry,
315
        (unsigned *) EXC_RESET_VEC);
2235 stepan 316
 
2464 jermar 317
    install_handler((unsigned) undef_instr_exception_entry,
318
        (unsigned *) EXC_UNDEF_INSTR_VEC);
2235 stepan 319
 
2464 jermar 320
    install_handler((unsigned) swi_exception_entry,
321
        (unsigned *) EXC_SWI_VEC);
2235 stepan 322
 
2464 jermar 323
    install_handler((unsigned) prefetch_abort_exception_entry,
324
        (unsigned *) EXC_PREFETCH_ABORT_VEC);
2235 stepan 325
 
2464 jermar 326
    install_handler((unsigned) data_abort_exception_entry,
327
        (unsigned *) EXC_DATA_ABORT_VEC);
2235 stepan 328
 
2464 jermar 329
    install_handler((unsigned) irq_exception_entry,
330
        (unsigned *) EXC_IRQ_VEC);
2235 stepan 331
 
332
    install_handler((unsigned)fiq_exception_entry,
2464 jermar 333
        (unsigned *) EXC_FIQ_VEC);
2179 stepan 334
}
335
 
2284 stepan 336
#ifdef HIGH_EXCEPTION_VECTORS
2329 kebrt 337
/** Activates use of high exception vectors addresses. */
2464 jermar 338
static void high_vectors(void)
2262 stepan 339
{
340
    uint32_t control_reg;
341
 
4055 trochtova 342
    asm volatile (
343
        "mrc p15, 0, %[control_reg], c1, c1"
344
        : [control_reg] "=r" (control_reg)
345
    );
2262 stepan 346
 
2464 jermar 347
    /* switch on the high vectors bit */
2262 stepan 348
    control_reg |= CP15_R1_HIGH_VECTORS_BIT;
349
 
4055 trochtova 350
    asm volatile (
351
        "mcr p15, 0, %[control_reg], c1, c1"
352
        :: [control_reg] "r" (control_reg)
353
    );
2262 stepan 354
}
2284 stepan 355
#endif
2262 stepan 356
 
2245 stepan 357
/** Initializes exception handling.
4055 trochtova 358
 *
2245 stepan 359
 * Installs low-level exception handlers and then registers
360
 * exceptions and their handlers to kernel exception dispatcher.
361
 */
2235 stepan 362
void exception_init(void)
363
{
2262 stepan 364
#ifdef HIGH_EXCEPTION_VECTORS
365
    high_vectors();
366
#endif
2245 stepan 367
    install_exception_handlers();
368
 
2235 stepan 369
    exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception);
2464 jermar 370
    exc_register(EXC_PREFETCH_ABORT, "prefetch abort",
371
        (iroutine) prefetch_abort);
2277 jancik 372
    exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort);
2284 stepan 373
    exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception);
2179 stepan 374
}
375
 
2326 kebrt 376
/** Prints #istate_t structure content.
377
 *
378
 * @param istate Structure to be printed.
379
 */
2304 kebrt 380
void print_istate(istate_t *istate)
381
{
382
    dprintf("istate dump:\n");
383
 
384
    dprintf(" r0: %x    r1: %x    r2: %x    r3: %x\n",
2464 jermar 385
        istate->r0, istate->r1, istate->r2, istate->r3);
2304 kebrt 386
    dprintf(" r4: %x    r5: %x    r6: %x    r7: %x\n",
2464 jermar 387
        istate->r4, istate->r5, istate->r6, istate->r7);
2304 kebrt 388
    dprintf(" r8: %x    r8: %x   r10: %x   r11: %x\n",
2464 jermar 389
        istate->r8, istate->r9, istate->r10, istate->r11);
2304 kebrt 390
    dprintf(" r12: %x    sp: %x    lr: %x  spsr: %x\n",
2464 jermar 391
        istate->r12, istate->sp, istate->lr, istate->spsr);
2304 kebrt 392
 
393
    dprintf(" pc: %x\n", istate->pc);
394
}
395
 
2179 stepan 396
/** @}
397
 */