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/*

 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt

 * All rights reserved.

 *

 * Redistribution and use in source and binary forms, with or without

 * modification, are permitted provided that the following conditions

 * are met:

 *

 * - Redistributions of source code must retain the above copyright

 *   notice, this list of conditions and the following disclaimer.

 * - Redistributions in binary form must reproduce the above copyright

 *   notice, this list of conditions and the following disclaimer in the

 *   documentation and/or other materials provided with the distribution.

 * - The name of the author may not be used to endorse or promote products

 *   derived from this software without specific prior written permission.

 *

 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR

 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES

 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.

 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,

 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT

 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,

 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY

 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF

 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 */

/** @addtogroup arm32mm

 * @{

 */

/** @file

 */

#ifndef KERN_arm32_PAGE_H_

#define KERN_arm32_PAGE_H_

#include <arch/mm/frame.h>

#include <mm/mm.h>

#include <arch/exception.h>

#define PAGE_WIDTH  FRAME_WIDTH

#define PAGE_SIZE   FRAME_SIZE

#define PAGE_COLOR_BITS 0           /* dummy */

#ifndef __ASM__

#   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)

#   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)

#else

#   define KA2PA(x) ((x) - 0x80000000)

#   define PA2KA(x) ((x) + 0x80000000)

#endif

#ifdef KERNEL

// "small" pages (4KB) used

#define PTL0_ENTRIES_ARCH    (2<<12)    // 4096

#define PTL1_ENTRIES_ARCH     0 

#define PTL2_ENTRIES_ARCH     0 

#define PTL3_ENTRIES_ARCH    (2<<8)     // 256

#define PTL0_INDEX_ARCH(vaddr)    (((vaddr) >> 20) & 0xfff)

#define PTL1_INDEX_ARCH(vaddr)    0 

#define PTL2_INDEX_ARCH(vaddr)    0 

#define PTL3_INDEX_ARCH(vaddr)    (((vaddr) >> 12) & 0x0ff)

#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *)( (((pte_level0_t*)(ptl0))[(i)]).coarse_table_addr << 10 ))

#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)

#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)

#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t)( (((pte_level1_t*)(ptl3))[(i)]).frame_base_addr << 12 ))

#define SET_PTL0_ADDRESS_ARCH(ptl0)         (set_ptl0_addr((pte_level0_t *)(ptl0)))

#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_level0_t *)(ptl0))[(i)].coarse_table_addr = (a)>>10)

#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)

#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)

#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_level1_t *)(ptl3))[(i)].frame_base_addr = (a)>>12)

#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i))

#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT

#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT

#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i))

#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_level0_flags((pte_level0_t *)(ptl0), (index_t)(i), (x))

#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)

#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)

#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_level1_flags((pte_level1_t *)(ptl3), (index_t)(i), (x))

#define PTE_VALID_ARCH(pte)                 (*((uint32_t *) (pte)) != 0)

#define PTE_PRESENT_ARCH(pte)               ( ((pte_level0_t *)(pte))->descriptor_type )

// pte should point into ptl3 

#define PTE_GET_FRAME_ARCH(pte)             ( ((pte_level1_t *)(pte))->frame_base_addr << FRAME_WIDTH)

// pte should point into ptl3 

#define PTE_WRITABLE_ARCH(pte)              ( ((pte_level1_t *)(pte))->access_permission_0 == pte_ap_user_rw_kernel_rw ) 

#define PTE_EXECUTABLE_ARCH(pte)            1

#ifndef __ASM__

/** Sets the address of level 0 page table.

 * \param pt pointer to the page table to set

 */  

static inline void set_ptl0_addr( pte_level0_t* pt)

{

    asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n"

        :

        : "r"(pt)

    );

}

//TODO Comment: Page table structure as in other architectures

static inline int get_pt_level0_flags(pte_level0_t *pt, index_t i)

{

    pte_level0_t *p = &pt[i];

    return (

        ( p->descriptor_type != pte_descriptor_not_preset ) << PAGE_PRESENT_SHIFT |

        ( 1 << PAGE_READ_SHIFT ) |

        ( 1 << PAGE_EXEC_SHIFT ) |

        ( 1 << PAGE_CACHEABLE  )

    );

}

static inline int get_pt_level1_flags(pte_level1_t *pt, index_t i)

{

  pte_level1_t *p = &pt[i];

    return (

        ( p->descriptor_type != pte_descriptor_not_preset )    << PAGE_PRESENT_SHIFT |

        ( (p->access_permission_0 == pte_ap_user_ro_kernel_rw) << PAGE_READ_SHIFT )  |

        ( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_READ_SHIFT )  |

        ( (p->access_permission_0 == pte_ap_user_rw_kernel_rw) << PAGE_WRITE_SHIFT ) |

        ( (p->access_permission_0 != pte_ap_user_no_kernel_rw) << PAGE_USER_SHIFT )  |

        ( 1 << PAGE_EXEC_SHIFT ) |

        ( p->bufferable << PAGE_CACHEABLE  )

    );

}

static inline void set_pt_level0_flags(pte_level0_t *pt, index_t i, int flags)

{

    pte_level0_t *p = &pt[i];

    if ( flags & PAGE_NOT_PRESENT ) {

        p->descriptor_type = pte_descriptor_not_preset;

        p->should_be_zero  = 1;

    } else {

        p->descriptor_type = pte_descriptor_coarse_table;

        p->should_be_zero  = 0;

    }

}

/* TODO: rewrite comment: We use same acess rights for whole page, so if page is set as not preset then

 * in acess_rigts_3 set value 1

 */  

static inline void set_pt_level1_flags(pte_level1_t *pt, index_t i, int flags)

{

    pte_level1_t *p = &pt[i];

    if ( flags & PAGE_NOT_PRESENT ) {

        p->descriptor_type      = pte_descriptor_not_preset;

        p->access_permission_3  = 1;

    } else {

        p->descriptor_type      = pte_descriptor_coarse_table;

        p->access_permission_3  = p->access_permission_0;

    }

    p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0;

    // default kernel rw, user none

    p->access_permission_0 = p->access_permission_1 =

        p->access_permission_2 = p->access_permission_3 = pte_ap_user_no_kernel_rw;

    if ( flags & PAGE_USER )  {

        if ( flags & PAGE_READ ) {

            p->access_permission_0 = p->access_permission_1 =

                p->access_permission_2 = p->access_permission_3 =

                pte_ap_user_ro_kernel_rw;

        }

        if ( flags & PAGE_WRITE ) {

            p->access_permission_0 = p->access_permission_1 =

                p->access_permission_2 = p->access_permission_3 =

                pte_ap_user_rw_kernel_rw;

        }

    }

}

extern void page_arch_init(void);

#endif /* __ASM__ */

#endif /* KERNEL */

#endif

/** @}

 */