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3528 pillai 1
/*
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 * Copyright (c) 2007 Michal Kebrt
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup arm32qemu_icp GXemul
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 *  @brief GXemul machine specific parts.
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 *  @ingroup arm32
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 * @{
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 */
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/** @file
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 *  @brief GXemul peripheries drivers declarations.
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 */
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#ifndef KERN_arm32_QEMU_ICP_H_
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#define KERN_arm32_QEMU_ICP_H_
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#include <console/chardev.h>
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/** Last interrupt number (beginning from 0) whose status is probed
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 * from interrupt controller
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 */
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#define QEMU_ICP_IRQC_MAX_IRQ       8
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/** Timer frequency */
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#define QEMU_ICP_TIMER_FREQ     100
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/** Struct containing mappings of qemu_icp HW devices into kernel part
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 *  of virtual address space.
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 */
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typedef struct {
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    uintptr_t videoram;
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    uintptr_t kbd;
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    uintptr_t rtc;
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    uintptr_t rtc_freq;
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    uintptr_t rtc_ack;
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    uintptr_t irqc;
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    uintptr_t irqc_mask;
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    uintptr_t irqc_unmask;
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    uintptr_t vga;
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    uintptr_t cmcr;
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} qemu_icp_hw_map_t;
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extern void qemu_icp_hw_map_init(void);
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extern void qemu_icp_console_init(devno_t devno);
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extern void qemu_icp_release_console(void);
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extern void qemu_icp_grab_console(void);
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extern void qemu_icp_timer_irq_start(void);
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extern void qemu_icp_debug_putc(char ch);
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extern void qemu_icp_cpu_halt(void);
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extern void qemu_icp_irq_exception(int exc_no, istate_t *istate);
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extern size_t qemu_icp_get_memory_size(void);
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extern uintptr_t qemu_icp_get_fb_address(void);
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extern void qemu_icp_fb_init(void);
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#endif
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/** @}
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 */