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55 jermar 1 
#
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# Copyright (C) 2005 Jakub Jermar
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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.text
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414 jermar 31 
.global context_save_arch
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.global context_restore_arch
55 jermar 33 
 
414 jermar 34 
context_save_arch:
322 jermar 35 
	alloc loc0 = ar.pfs, 1, 8, 0, 0
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	mov loc1 = ar.unat	;;
94 jermar 37 
	/* loc2 */
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	mov loc3 = ar.rsc
100 jermar 39 
 
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	.auto
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	/*
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	 * Flush dirty registers to backing store.
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	 * After this ar.bsp and ar.bspstore are equal.
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	 */
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	flushrs
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	mov loc4 = ar.bsp
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	/*
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	 * Put RSE to enforced lazy mode.
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	 * So that ar.rnat can be read.
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	 */
435 jermar 53 
	and loc5 = ~3, loc3
100 jermar 54 
	mov ar.rsc = loc5
94 jermar 55 
	mov loc5 = ar.rnat
100 jermar 56 
 
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	.explicit
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94 jermar 59 
	mov loc6 = ar.lc
59 jermar 60 
 
94 jermar 61 
	/*
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	 * Save application registers
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	 */
83 jermar 64 
	st8 [in0] = loc0, 8	;;	/* save ar.pfs */
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	st8 [in0] = loc1, 8	;;	/* save ar.unat (caller) */
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	mov loc2 = in0		;;
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	add in0 = 8, in0	;;	/* skip ar.unat (callee) */
94 jermar 68 
	st8 [in0] = loc3, 8	;;	/* save ar.rsc */
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	st8 [in0] = loc4, 8	;;	/* save ar.bsp */
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	st8 [in0] = loc5, 8	;;	/* save ar.rnat */
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	st8 [in0] = loc6, 8	;;	/* save ar.lc */
83 jermar 72 
 
59 jermar 73 
	/*
83 jermar 74 
	 * Save general registers including NaT bits
82 jermar 75 
	 */
83 jermar 76 
	st8.spill [in0] = r1, 8		;;
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	st8.spill [in0] = r4, 8		;;
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	st8.spill [in0] = r5, 8		;;
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	st8.spill [in0] = r6, 8		;;
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	st8.spill [in0] = r7, 8		;;
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	st8.spill [in0] = r12, 8	;;	/* save sp */
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	st8.spill [in0] = r13, 8	;;
59 jermar 83 
 
83 jermar 84 
	mov loc3 = ar.unat		;;
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	st8 [loc2] = loc3		/* save ar.unat (callee) */
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82 jermar 87 
	/*
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	 * Save branch registers
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	 */
83 jermar 90 
	mov loc2 = b0		;;
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	st8 [in0] = loc2, 8		/* save pc */
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	mov loc3 = b1		;;
82 jermar 93 
	st8 [in0] = loc3, 8
83 jermar 94 
	mov loc4 = b2		;;
82 jermar 95 
	st8 [in0] = loc4, 8
83 jermar 96 
	mov loc5 = b3		;;
82 jermar 97 
	st8 [in0] = loc5, 8
83 jermar 98 
	mov loc6 = b4		;;
82 jermar 99 
	st8 [in0] = loc6, 8
83 jermar 100 
	mov loc7 = b5		;;
82 jermar 101 
	st8 [in0] = loc7, 8
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	/*
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	 * Save predicate registers
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	 */
83 jermar 106 
	mov loc2 = pr		;;
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	st8 [in0] = loc2, 8
59 jermar 108 
 
83 jermar 109 
	mov ar.unat = loc1
59 jermar 110 
 
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	add r8 = r0, r0, 1 		/* context_save returns 1 */
60 jermar 112 
	br.ret.sptk.many b0
55 jermar 113 
 
414 jermar 114 
context_restore_arch:
416 jermar 115 
	alloc loc0 = ar.pfs, 1, 9, 0, 0	;;
59 jermar 116 
 
94 jermar 117 
	ld8 loc0 = [in0], 8	;;	/* load ar.pfs */
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	ld8 loc1 = [in0], 8	;;	/* load ar.unat (caller) */
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	ld8 loc2 = [in0], 8	;;	/* load ar.unat (callee) */
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	ld8 loc3 = [in0], 8	;;	/* load ar.rsc */
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	ld8 loc4 = [in0], 8	;;	/* load ar.bsp */
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	ld8 loc5 = [in0], 8	;;	/* load ar.rnat */
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	ld8 loc6 = [in0], 8	;;	/* load ar.lc */
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100 jermar 125 
	.auto
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59 jermar 127 
	/*
100 jermar 128 
	 * Invalidate the ALAT
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	 */
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	invala
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	/*
416 jermar 133 
	 * Put RSE to enforced lazy mode.
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	 * So that ar.bspstore and ar.rnat can be written.
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	 */
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	movl loc8 = ~3
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	and loc8 = loc3, loc8
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	mov ar.rsc = loc8
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	/*
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	 * Flush dirty registers to backing store.
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	 * We do this because we want the following move
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	 * to ar.bspstore to assign the same value to ar.bsp.
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	 */
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	flushrs
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	/*
94 jermar 148 
	 * Restore application registers
59 jermar 149 
	 */
416 jermar 150 
	mov ar.bspstore = loc4	/* rse.bspload = ar.bsp = ar.bspstore = loc4 */
100 jermar 151 
	mov ar.rnat = loc5
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	mov ar.pfs = loc0
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	mov ar.rsc = loc3
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	.explicit
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83 jermar 157 
	mov ar.unat = loc2	;;
94 jermar 158 
	mov ar.lc = loc6
83 jermar 159 
 
82 jermar 160 
	/*
83 jermar 161 
	 * Restore general registers including NaT bits
82 jermar 162 
	 */
83 jermar 163 
	ld8.fill r1 = [in0], 8	;;
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	ld8.fill r4 = [in0], 8	;;
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	ld8.fill r5 = [in0], 8	;;
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	ld8.fill r6 = [in0], 8	;;
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	ld8.fill r7 = [in0], 8	;;
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	ld8.fill r12 = [in0], 8	;;	/* restore sp */
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	ld8.fill r13 = [in0], 8	;;
59 jermar 170 
 
82 jermar 171 
	/*
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	 * Restore branch registers
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	 */
83 jermar 174 
	ld8 loc2 = [in0], 8	;;	/* restore pc */
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	mov b0 = loc2
82 jermar 176 
	ld8 loc3 = [in0], 8	;;
83 jermar 177 
	mov b1 = loc3
82 jermar 178 
	ld8 loc4 = [in0], 8	;;
83 jermar 179 
	mov b2 = loc4
82 jermar 180 
	ld8 loc5 = [in0], 8	;;
83 jermar 181 
	mov b3 = loc5
82 jermar 182 
	ld8 loc6 = [in0], 8	;;
83 jermar 183 
	mov b4 = loc6
82 jermar 184 
	ld8 loc7 = [in0], 8	;;
83 jermar 185 
	mov b5 = loc7
82 jermar 186 
 
83 jermar 187 
	/*
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	 * Restore predicate registers
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	 */
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	ld8 loc2 = [in0], 8	;;
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	mov pr = loc2, ~0
59 jermar 192 
 
83 jermar 193 
	mov ar.unat = loc1
59 jermar 194 
 
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	mov r8 = r0			/* context_restore returns 0 */
60 jermar 196 
	br.ret.sptk.many b0