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Rev | Author | Line No. | Line |
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1301 | jermar | 1 | /* |
2 | * The PCI Library -- Direct Configuration access via i386 Ports |
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3 | * |
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4 | * Copyright (c) 1997--2004 Martin Mares <mj@ucw.cz> |
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5 | * |
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1324 | jermar | 6 | * May 8, 2006 - Modified and ported to HelenOS by Jakub Jermar. |
1301 | jermar | 7 | * |
8 | * Can be freely distributed and used under the terms of the GNU GPL. |
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9 | */ |
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10 | |||
11 | #include <unistd.h> |
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12 | |||
13 | #include "internal.h" |
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14 | |||
15 | static inline void outb(u8 b, u16 port) |
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16 | { |
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1302 | jermar | 17 | asm volatile ("outb %0, %1\n" :: "a" (b), "d" (port)); |
1301 | jermar | 18 | } |
19 | |||
20 | static inline void outw(u16 w, u16 port) |
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21 | { |
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1302 | jermar | 22 | asm volatile ("outw %0, %1\n" :: "a" (w), "d" (port)); |
1301 | jermar | 23 | } |
24 | |||
25 | static inline void outl(u32 l, u16 port) |
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26 | { |
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1302 | jermar | 27 | asm volatile ("outl %0, %1\n" :: "a" (l), "d" (port)); |
1301 | jermar | 28 | } |
29 | |||
30 | static inline u8 inb(u16 port) |
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31 | { |
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32 | u8 val; |
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1302 | jermar | 33 | |
34 | asm volatile ("inb %1, %0 \n" : "=a" (val) : "d"(port)); |
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1301 | jermar | 35 | return val; |
36 | } |
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37 | |||
38 | static inline u16 inw(u16 port) |
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39 | { |
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40 | u16 val; |
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1302 | jermar | 41 | |
42 | asm volatile ("inw %1, %0 \n" : "=a" (val) : "d"(port)); |
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1301 | jermar | 43 | return val; |
44 | } |
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45 | |||
46 | static inline u32 inl(u16 port) |
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47 | { |
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48 | u32 val; |
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1302 | jermar | 49 | |
50 | asm volatile ("inl %1, %0 \n" : "=a" (val) : "d"(port)); |
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1301 | jermar | 51 | return val; |
52 | } |
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53 | |||
1302 | jermar | 54 | static void conf12_init(struct pci_access *a) |
1301 | jermar | 55 | { |
56 | } |
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57 | |||
1302 | jermar | 58 | static void conf12_cleanup(struct pci_access *a UNUSED) |
1301 | jermar | 59 | { |
60 | } |
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61 | |||
62 | /* |
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63 | * Before we decide to use direct hardware access mechanisms, we try to do some |
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64 | * trivial checks to ensure it at least _seems_ to be working -- we just test |
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65 | * whether bus 00 contains a host bridge (this is similar to checking |
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66 | * techniques used in XFree86, but ours should be more reliable since we |
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67 | * attempt to make use of direct access hints provided by the PCI BIOS). |
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68 | * |
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69 | * This should be close to trivial, but it isn't, because there are buggy |
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70 | * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID. |
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71 | */ |
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72 | |||
1302 | jermar | 73 | static int intel_sanity_check(struct pci_access *a, struct pci_methods *m) |
1301 | jermar | 74 | { |
1302 | jermar | 75 | struct pci_dev d; |
1301 | jermar | 76 | |
1302 | jermar | 77 | a->debug("...sanity check"); |
78 | d.bus = 0; |
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79 | d.func = 0; |
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80 | for (d.dev = 0; d.dev < 32; d.dev++) { |
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81 | u16 class, vendor; |
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4682 | svoboda | 82 | if ((m->read(&d, PCI_CLASS_DEVICE, (byte *) & class, |
1302 | jermar | 83 | sizeof(class)) |
84 | && (class == cpu_to_le16(PCI_CLASS_BRIDGE_HOST) |
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4682 | svoboda | 85 | || class == cpu_to_le16(PCI_CLASS_DISPLAY_VGA))) |
86 | || (m->read(&d, PCI_VENDOR_ID, (byte *) & vendor, |
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1302 | jermar | 87 | sizeof(vendor)) |
88 | && (vendor == cpu_to_le16(PCI_VENDOR_ID_INTEL) |
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4682 | svoboda | 89 | || vendor == cpu_to_le16(PCI_VENDOR_ID_COMPAQ)))) { |
1302 | jermar | 90 | a->debug("...outside the Asylum at 0/%02x/0", |
91 | d.dev); |
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92 | return 1; |
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93 | } |
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1301 | jermar | 94 | } |
1302 | jermar | 95 | a->debug("...insane"); |
96 | return 0; |
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1301 | jermar | 97 | } |
98 | |||
99 | /* |
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100 | * Configuration type 1 |
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101 | */ |
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102 | |||
103 | #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3)) |
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104 | |||
1302 | jermar | 105 | static int conf1_detect(struct pci_access *a) |
1301 | jermar | 106 | { |
1302 | jermar | 107 | unsigned int tmp; |
108 | int res = 0; |
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1301 | jermar | 109 | |
1302 | jermar | 110 | outb(0x01, 0xCFB); |
111 | tmp = inl(0xCF8); |
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112 | outl(0x80000000, 0xCF8); |
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113 | if (inl(0xCF8) == 0x80000000) |
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114 | res = 1; |
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115 | outl(tmp, 0xCF8); |
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116 | if (res) |
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117 | res = intel_sanity_check(a, &pm_intel_conf1); |
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118 | return res; |
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1301 | jermar | 119 | } |
120 | |||
1302 | jermar | 121 | static int conf1_read(struct pci_dev *d, int pos, byte * buf, int len) |
1301 | jermar | 122 | { |
1302 | jermar | 123 | int addr = 0xcfc + (pos & 3); |
1301 | jermar | 124 | |
1302 | jermar | 125 | if (pos >= 256) |
126 | return 0; |
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1301 | jermar | 127 | |
1302 | jermar | 128 | outl(0x80000000 | ((d->bus & 0xff) << 16) | |
129 | (PCI_DEVFN(d->dev, d->func) << 8) | (pos & ~3), 0xcf8); |
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1301 | jermar | 130 | |
1302 | jermar | 131 | switch (len) { |
132 | case 1: |
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133 | buf[0] = inb(addr); |
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134 | break; |
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135 | case 2: |
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136 | ((u16 *) buf)[0] = cpu_to_le16(inw(addr)); |
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137 | break; |
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138 | case 4: |
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139 | ((u32 *) buf)[0] = cpu_to_le32(inl(addr)); |
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140 | break; |
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141 | default: |
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142 | return pci_generic_block_read(d, pos, buf, len); |
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143 | } |
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144 | return 1; |
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1301 | jermar | 145 | } |
146 | |||
1302 | jermar | 147 | static int conf1_write(struct pci_dev *d, int pos, byte * buf, int len) |
1301 | jermar | 148 | { |
1302 | jermar | 149 | int addr = 0xcfc + (pos & 3); |
1301 | jermar | 150 | |
1302 | jermar | 151 | if (pos >= 256) |
152 | return 0; |
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1301 | jermar | 153 | |
1302 | jermar | 154 | outl(0x80000000 | ((d->bus & 0xff) << 16) | |
155 | (PCI_DEVFN(d->dev, d->func) << 8) | (pos & ~3), 0xcf8); |
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1301 | jermar | 156 | |
1302 | jermar | 157 | switch (len) { |
158 | case 1: |
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159 | outb(buf[0], addr); |
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160 | break; |
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161 | case 2: |
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162 | outw(le16_to_cpu(((u16 *) buf)[0]), addr); |
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163 | break; |
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164 | case 4: |
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165 | outl(le32_to_cpu(((u32 *) buf)[0]), addr); |
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166 | break; |
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167 | default: |
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168 | return pci_generic_block_write(d, pos, buf, len); |
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169 | } |
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170 | return 1; |
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1301 | jermar | 171 | } |
172 | |||
173 | /* |
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174 | * Configuration type 2. Obsolete and brain-damaged, but existing. |
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175 | */ |
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176 | |||
1302 | jermar | 177 | static int conf2_detect(struct pci_access *a) |
1301 | jermar | 178 | { |
1302 | jermar | 179 | /* This is ugly and tends to produce false positives. Beware. */ |
180 | outb(0x00, 0xCFB); |
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181 | outb(0x00, 0xCF8); |
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182 | outb(0x00, 0xCFA); |
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183 | if (inb(0xCF8) == 0x00 && inb(0xCFA) == 0x00) |
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184 | return intel_sanity_check(a, &pm_intel_conf2); |
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185 | else |
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186 | return 0; |
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1301 | jermar | 187 | } |
188 | |||
1302 | jermar | 189 | static int conf2_read(struct pci_dev *d, int pos, byte * buf, int len) |
1301 | jermar | 190 | { |
1302 | jermar | 191 | int addr = 0xc000 | (d->dev << 8) | pos; |
1301 | jermar | 192 | |
1302 | jermar | 193 | if (pos >= 256) |
194 | return 0; |
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1301 | jermar | 195 | |
1302 | jermar | 196 | if (d->dev >= 16) |
197 | /* conf2 supports only 16 devices per bus */ |
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198 | return 0; |
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199 | outb((d->func << 1) | 0xf0, 0xcf8); |
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200 | outb(d->bus, 0xcfa); |
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201 | switch (len) { |
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202 | case 1: |
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203 | buf[0] = inb(addr); |
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204 | break; |
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205 | case 2: |
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206 | ((u16 *) buf)[0] = cpu_to_le16(inw(addr)); |
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207 | break; |
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208 | case 4: |
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209 | ((u32 *) buf)[0] = cpu_to_le32(inl(addr)); |
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210 | break; |
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211 | default: |
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212 | outb(0, 0xcf8); |
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213 | return pci_generic_block_read(d, pos, buf, len); |
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214 | } |
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215 | outb(0, 0xcf8); |
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216 | return 1; |
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1301 | jermar | 217 | } |
218 | |||
1302 | jermar | 219 | static int conf2_write(struct pci_dev *d, int pos, byte * buf, int len) |
1301 | jermar | 220 | { |
1302 | jermar | 221 | int addr = 0xc000 | (d->dev << 8) | pos; |
1301 | jermar | 222 | |
1302 | jermar | 223 | if (pos >= 256) |
224 | return 0; |
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1301 | jermar | 225 | |
1302 | jermar | 226 | if (d->dev >= 16) |
1307 | jermar | 227 | d->access->error("conf2_write: only first 16 devices exist."); |
1302 | jermar | 228 | outb((d->func << 1) | 0xf0, 0xcf8); |
229 | outb(d->bus, 0xcfa); |
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230 | switch (len) { |
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231 | case 1: |
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232 | outb(buf[0], addr); |
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233 | break; |
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234 | case 2: |
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235 | outw(le16_to_cpu(*(u16 *) buf), addr); |
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236 | break; |
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237 | case 4: |
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238 | outl(le32_to_cpu(*(u32 *) buf), addr); |
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239 | break; |
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240 | default: |
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241 | outb(0, 0xcf8); |
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242 | return pci_generic_block_write(d, pos, buf, len); |
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243 | } |
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244 | outb(0, 0xcf8); |
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245 | return 1; |
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1301 | jermar | 246 | } |
247 | |||
248 | struct pci_methods pm_intel_conf1 = { |
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1302 | jermar | 249 | "Intel-conf1", |
250 | NULL, /* config */ |
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251 | conf1_detect, |
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252 | conf12_init, |
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253 | conf12_cleanup, |
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254 | pci_generic_scan, |
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255 | pci_generic_fill_info, |
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256 | conf1_read, |
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257 | conf1_write, |
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258 | NULL, /* init_dev */ |
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259 | NULL /* cleanup_dev */ |
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1301 | jermar | 260 | }; |
261 | |||
262 | struct pci_methods pm_intel_conf2 = { |
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1302 | jermar | 263 | "Intel-conf2", |
264 | NULL, /* config */ |
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265 | conf2_detect, |
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266 | conf12_init, |
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267 | conf12_cleanup, |
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268 | pci_generic_scan, |
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269 | pci_generic_fill_info, |
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270 | conf2_read, |
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271 | conf2_write, |
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272 | NULL, /* init_dev */ |
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273 | NULL /* cleanup_dev */ |
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1301 | jermar | 274 | }; |