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529 jermar 1
#
2
# Copyright (C) 2005 Jakub Jermar
3
# All rights reserved.
4
#
5
# Redistribution and use in source and binary forms, with or without
6
# modification, are permitted provided that the following conditions
7
# are met:
8
#
9
# - Redistributions of source code must retain the above copyright
10
#   notice, this list of conditions and the following disclaimer.
11
# - Redistributions in binary form must reproduce the above copyright
12
#   notice, this list of conditions and the following disclaimer in the
13
#   documentation and/or other materials provided with the distribution.
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
16
#
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
#
28
 
29
/**
1865 jermar 30
 * @file
31
 * @brief This file contains kernel trap table.
529 jermar 32
 */
666 jermar 33
 
34
.register %g2, #scratch
35
.register %g3, #scratch
36
 
529 jermar 37
.text
38
 
630 jermar 39
#include <arch/trap/trap_table.h>
40
#include <arch/trap/regwin.h>
663 jermar 41
#include <arch/trap/interrupt.h>
667 jermar 42
#include <arch/trap/exception.h>
1862 jermar 43
#include <arch/trap/syscall.h>
863 jermar 44
#include <arch/trap/mmu.h>
1860 jermar 45
#include <arch/mm/mmu.h>
1857 jermar 46
#include <arch/mm/page.h>
667 jermar 47
#include <arch/stack.h>
1851 jermar 48
#include <arch/regdef.h>
529 jermar 49
 
50
#define TABLE_SIZE	TRAP_TABLE_SIZE
51
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
52
 
53
/*
634 jermar 54
 * Kernel trap table.
529 jermar 55
 */
56
.align TABLE_SIZE
57
.global trap_table
58
trap_table:
59
 
667 jermar 60
/* TT = 0x08, TL = 0, instruction_access_exception */
61
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
1870 jermar 62
.global instruction_access_exception_tl0
63
instruction_access_exception_tl0:
64
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
65
	PREEMPTIBLE_HANDLER instruction_access_exception
667 jermar 66
 
1870 jermar 67
/* TT = 0x0a, TL = 0, instruction_access_error */
68
.org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE
69
.global instruction_access_error_tl0
70
instruction_access_error_tl0:
71
	PREEMPTIBLE_HANDLER instruction_access_error
72
 
883 jermar 73
/* TT = 0x10, TL = 0, illegal_instruction */
74
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
1870 jermar 75
.global illegal_instruction_tl0
76
illegal_instruction_tl0:
77
	PREEMPTIBLE_HANDLER illegal_instruction
883 jermar 78
 
1870 jermar 79
/* TT = 0x11, TL = 0, privileged_opcode */
80
.org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE
81
.global privileged_opcode_tl0
82
privileged_opcode_tl0:
83
	PREEMPTIBLE_HANDLER privileged_opcode
84
 
1883 jermar 85
/* TT = 0x12, TL = 0, unimplemented_LDD */
86
.org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE
87
.global unimplemented_LDD_tl0
88
unimplemented_LDD_tl0:
89
	PREEMPTIBLE_HANDLER unimplemented_LDD
90
 
91
/* TT = 0x13, TL = 0, unimplemented_STD */
92
.org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE
93
.global unimplemented_STD_tl0
94
unimplemented_STD_tl0:
95
	PREEMPTIBLE_HANDLER unimplemented_STD
96
 
1882 jermar 97
/* TT = 0x20, TL = 0, fb_disabled handler */
98
.org trap_table + TT_FP_DISABLED*ENTRY_SIZE
99
.global fb_disabled_tl0
100
fp_disabled_tl0:
101
	PREEMPTIBLE_HANDLER fp_disabled
102
 
1883 jermar 103
/* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */
104
.org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE
105
.global fb_exception_ieee_754_tl0
106
fp_exception_ieee_754_tl0:
107
	PREEMPTIBLE_HANDLER fp_exception_ieee_754
108
 
109
/* TT = 0x22, TL = 0, fb_exception_other handler */
110
.org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE
111
.global fb_exception_other_tl0
112
fp_exception_other_tl0:
113
	PREEMPTIBLE_HANDLER fp_exception_other
114
 
115
/* TT = 0x23, TL = 0, tag_overflow */
116
.org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE
117
.global tag_overflow_tl0
118
tag_overflow_tl0:
119
	PREEMPTIBLE_HANDLER tag_overflow
120
 
663 jermar 121
/* TT = 0x24, TL = 0, clean_window handler */
634 jermar 122
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
1882 jermar 123
.global clean_window_tl0
124
clean_window_tl0:
630 jermar 125
	CLEAN_WINDOW_HANDLER
529 jermar 126
 
1870 jermar 127
/* TT = 0x28, TL = 0, division_by_zero */
128
.org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE
129
.global division_by_zero_tl0
130
division_by_zero_tl0:
131
	PREEMPTIBLE_HANDLER division_by_zero
132
 
133
/* TT = 0x30, TL = 0, data_access_exception */
134
.org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE
135
.global data_access_exception_tl0
136
data_access_exception_tl0:
137
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
138
	PREEMPTIBLE_HANDLER data_access_exception
139
 
897 jermar 140
/* TT = 0x32, TL = 0, data_access_error */
141
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
1870 jermar 142
.global data_access_error_tl0
143
data_access_error_tl0:
144
	PREEMPTIBLE_HANDLER data_access_error
897 jermar 145
 
667 jermar 146
/* TT = 0x34, TL = 0, mem_address_not_aligned */
147
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
1870 jermar 148
.global mem_address_not_aligned_tl0
149
mem_address_not_aligned_tl0:
150
	PREEMPTIBLE_HANDLER mem_address_not_aligned
667 jermar 151
 
1883 jermar 152
/* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */
153
.org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
154
.global LDDF_mem_address_not_aligned_tl0
155
LDDF_mem_address_not_aligned_tl0:
156
	PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned
157
 
158
/* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */
159
.org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
160
.global STDF_mem_address_not_aligned_tl0
161
STDF_mem_address_not_aligned_tl0:
162
	PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned
163
 
164
/* TT = 0x37, TL = 0, privileged_action */
1870 jermar 165
.org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE
166
.global privileged_action_tl0
167
privileged_action_tl0:
168
	PREEMPTIBLE_HANDLER privileged_action
169
 
1883 jermar 170
/* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */
171
.org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
172
.global LDQF_mem_address_not_aligned_tl0
173
LDQF_mem_address_not_aligned_tl0:
174
	PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned
175
 
176
/* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */
177
.org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
178
.global STQF_mem_address_not_aligned_tl0
179
STQF_mem_address_not_aligned_tl0:
180
	PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned
181
 
664 jermar 182
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
183
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
1870 jermar 184
.global interrupt_level_1_handler_tl0
185
interrupt_level_1_handler_tl0:
664 jermar 186
	INTERRUPT_LEVEL_N_HANDLER 1
187
 
188
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
189
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
1870 jermar 190
.global interrupt_level_2_handler_tl0
191
interrupt_level_2_handler_tl0:
664 jermar 192
	INTERRUPT_LEVEL_N_HANDLER 2
193
 
194
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
195
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
1870 jermar 196
.global interrupt_level_3_handler_tl0
197
interrupt_level_3_handler_tl0:
664 jermar 198
	INTERRUPT_LEVEL_N_HANDLER 3
199
 
200
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
201
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
1870 jermar 202
.global interrupt_level_4_handler_tl0
203
interrupt_level_4_handler_tl0:
664 jermar 204
	INTERRUPT_LEVEL_N_HANDLER 4
205
 
206
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
207
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
1870 jermar 208
.global interrupt_level_5_handler_tl0
209
interrupt_level_5_handler_tl0:
664 jermar 210
	INTERRUPT_LEVEL_N_HANDLER 5
211
 
212
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
213
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
1870 jermar 214
.global interrupt_level_6_handler_tl0
215
interrupt_level_6_handler_tl0:
664 jermar 216
	INTERRUPT_LEVEL_N_HANDLER 6
217
 
218
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
219
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
1870 jermar 220
.global interrupt_level_7_handler_tl0
221
interrupt_level_7_handler_tl0:
664 jermar 222
	INTERRUPT_LEVEL_N_HANDLER 7
223
 
224
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
225
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
1870 jermar 226
.global interrupt_level_8_handler_tl0
227
interrupt_level_8_handler_tl0:
664 jermar 228
	INTERRUPT_LEVEL_N_HANDLER 8
229
 
230
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
231
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
1870 jermar 232
.global interrupt_level_9_handler_tl0
233
interrupt_level_9_handler_tl0:
664 jermar 234
	INTERRUPT_LEVEL_N_HANDLER 9
235
 
236
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
237
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
1870 jermar 238
.global interrupt_level_10_handler_tl0
239
interrupt_level_10_handler_tl0:
664 jermar 240
	INTERRUPT_LEVEL_N_HANDLER 10
241
 
242
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
243
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
1870 jermar 244
.global interrupt_level_11_handler_tl0
245
interrupt_level_11_handler_tl0:
664 jermar 246
	INTERRUPT_LEVEL_N_HANDLER 11
247
 
248
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
249
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
1870 jermar 250
.global interrupt_level_12_handler_tl0
251
interrupt_level_12_handler_tl0:
664 jermar 252
	INTERRUPT_LEVEL_N_HANDLER 12
253
 
254
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
255
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
1870 jermar 256
.global interrupt_level_13_handler_tl0
257
interrupt_level_13_handler_tl0:
664 jermar 258
	INTERRUPT_LEVEL_N_HANDLER 13
259
 
260
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
261
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
1870 jermar 262
.global interrupt_level_14_handler_tl0
263
interrupt_level_14_handler_tl0:
664 jermar 264
	INTERRUPT_LEVEL_N_HANDLER 14
265
 
266
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
267
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
1870 jermar 268
.global interrupt_level_15_handler_tl0
269
interrupt_level_15_handler_tl0:
664 jermar 270
	INTERRUPT_LEVEL_N_HANDLER 15
271
 
663 jermar 272
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
273
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
1870 jermar 274
.global interrupt_vector_trap_handler_tl0
275
interrupt_vector_trap_handler_tl0:
663 jermar 276
	INTERRUPT_VECTOR_TRAP_HANDLER
277
 
863 jermar 278
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
279
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
1870 jermar 280
.global fast_instruction_access_mmu_miss_handler_tl0
281
fast_instruction_access_mmu_miss_handler_tl0:
863 jermar 282
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
283
 
284
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
285
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
1870 jermar 286
.global fast_data_access_mmu_miss_handler_tl0
287
fast_data_access_mmu_miss_handler_tl0:
288
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 0
863 jermar 289
 
290
/* TT = 0x6c, TL = 0, fast_data_access_protection */
291
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
1870 jermar 292
.global fast_data_access_protection_handler_tl0
293
fast_data_access_protection_handler_tl0:
294
	FAST_DATA_ACCESS_PROTECTION_HANDLER 0
863 jermar 295
 
663 jermar 296
/* TT = 0x80, TL = 0, spill_0_normal handler */
634 jermar 297
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
1870 jermar 298
.global spill_0_normal_tl0
299
spill_0_normal_tl0:
1852 jermar 300
	SPILL_NORMAL_HANDLER_KERNEL
529 jermar 301
 
1856 jermar 302
/* TT = 0x84, TL = 0, spill_1_normal handler */
303
.org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE
1870 jermar 304
.global spill_1_normal_tl0
305
spill_1_normal_tl0:
1856 jermar 306
	SPILL_NORMAL_HANDLER_USERSPACE
307
 
308
/* TT = 0x88, TL = 0, spill_2_normal handler */
309
.org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE
1870 jermar 310
.global spill_2_normal_tl0
311
spill_2_normal_tl0:
1856 jermar 312
	SPILL_TO_USPACE_WINDOW_BUFFER
313
 
1864 jermar 314
/* TT = 0xa0, TL = 0, spill_0_other handler */
315
.org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE
1870 jermar 316
.global spill_0_other_tl0
317
spill_0_other_tl0:
1864 jermar 318
	SPILL_TO_USPACE_WINDOW_BUFFER
319
 
663 jermar 320
/* TT = 0xc0, TL = 0, fill_0_normal handler */
634 jermar 321
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
1870 jermar 322
.global fill_0_normal_tl0
323
fill_0_normal_tl0:
1852 jermar 324
	FILL_NORMAL_HANDLER_KERNEL
630 jermar 325
 
1856 jermar 326
/* TT = 0xc4, TL = 0, fill_1_normal handler */
327
.org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE
1870 jermar 328
.global fill_1_normal_tl0
329
fill_1_normal_tl0:
1856 jermar 330
	FILL_NORMAL_HANDLER_USERSPACE
331
 
1862 jermar 332
/* TT = 0x100, TL = 0, trap_instruction_0 */
333
.org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE
1870 jermar 334
.global trap_instruction_0_tl0
335
trap_instruction_0_tl0:
1862 jermar 336
	TRAP_INSTRUCTION 0
337
 
338
/* TT = 0x101, TL = 0, trap_instruction_1 */
339
.org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE
1870 jermar 340
.global trap_instruction_1_tl0
341
trap_instruction_1_tl0:
1862 jermar 342
	TRAP_INSTRUCTION 1
343
 
344
/* TT = 0x102, TL = 0, trap_instruction_2 */
345
.org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE
1870 jermar 346
.global trap_instruction_2_tl0
347
trap_instruction_2_tl0:
1862 jermar 348
	TRAP_INSTRUCTION 2
349
 
350
/* TT = 0x103, TL = 0, trap_instruction_3 */
351
.org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE
1870 jermar 352
.global trap_instruction_3_tl0
353
trap_instruction_3_tl0:
1862 jermar 354
	TRAP_INSTRUCTION 3
355
 
356
/* TT = 0x104, TL = 0, trap_instruction_4 */
357
.org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE
1870 jermar 358
.global trap_instruction_4_tl0
359
trap_instruction_4_tl0:
1862 jermar 360
	TRAP_INSTRUCTION 4
361
 
362
/* TT = 0x105, TL = 0, trap_instruction_5 */
363
.org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE
1870 jermar 364
.global trap_instruction_5_tl0
365
trap_instruction_5_tl0:
1862 jermar 366
	TRAP_INSTRUCTION 5
367
 
368
/* TT = 0x106, TL = 0, trap_instruction_6 */
369
.org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE
1870 jermar 370
.global trap_instruction_6_tl0
371
trap_instruction_6_tl0:
1862 jermar 372
	TRAP_INSTRUCTION 6
373
 
374
/* TT = 0x107, TL = 0, trap_instruction_7 */
375
.org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE
1870 jermar 376
.global trap_instruction_7_tl0
377
trap_instruction_7_tl0:
1862 jermar 378
	TRAP_INSTRUCTION 7
379
 
380
/* TT = 0x108, TL = 0, trap_instruction_8 */
381
.org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE
1870 jermar 382
.global trap_instruction_8_tl0
383
trap_instruction_8_tl0:
1862 jermar 384
	TRAP_INSTRUCTION 8
385
 
386
/* TT = 0x109, TL = 0, trap_instruction_9 */
387
.org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE
1870 jermar 388
.global trap_instruction_9_tl0
389
trap_instruction_9_tl0:
1862 jermar 390
	TRAP_INSTRUCTION 9
391
 
392
/* TT = 0x10a, TL = 0, trap_instruction_10 */
393
.org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE
1870 jermar 394
.global trap_instruction_10_tl0
395
trap_instruction_10_tl0:
1862 jermar 396
	TRAP_INSTRUCTION 10
397
 
398
/* TT = 0x10b, TL = 0, trap_instruction_11 */
399
.org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE
1870 jermar 400
.global trap_instruction_11_tl0
401
trap_instruction_11_tl0:
1862 jermar 402
	TRAP_INSTRUCTION 11
403
 
404
/* TT = 0x10c, TL = 0, trap_instruction_12 */
405
.org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE
1870 jermar 406
.global trap_instruction_12_tl0
407
trap_instruction_12_tl0:
1862 jermar 408
	TRAP_INSTRUCTION 12
409
 
410
/* TT = 0x10d, TL = 0, trap_instruction_13 */
411
.org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE
1870 jermar 412
.global trap_instruction_13_tl0
413
trap_instruction_13_tl0:
1862 jermar 414
	TRAP_INSTRUCTION 13
415
 
416
/* TT = 0x10e, TL = 0, trap_instruction_14 */
417
.org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE
1870 jermar 418
.global trap_instruction_14_tl0
419
trap_instruction_14_tl0:
1862 jermar 420
	TRAP_INSTRUCTION 14
421
 
422
/* TT = 0x10f, TL = 0, trap_instruction_15 */
423
.org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE
1870 jermar 424
.global trap_instruction_15_tl0
425
trap_instruction_15_tl0:
1862 jermar 426
	TRAP_INSTRUCTION 15
427
 
428
/* TT = 0x110, TL = 0, trap_instruction_16 */
429
.org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE
1870 jermar 430
.global trap_instruction_16_tl0
431
trap_instruction_16_tl0:
1862 jermar 432
	TRAP_INSTRUCTION 16
433
 
434
/* TT = 0x111, TL = 0, trap_instruction_17 */
435
.org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE
1870 jermar 436
.global trap_instruction_17_tl0
437
trap_instruction_17_tl0:
1862 jermar 438
	TRAP_INSTRUCTION 17
439
 
440
/* TT = 0x112, TL = 0, trap_instruction_18 */
441
.org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE
1870 jermar 442
.global trap_instruction_18_tl0
443
trap_instruction_18_tl0:
1862 jermar 444
	TRAP_INSTRUCTION 18
445
 
446
/* TT = 0x113, TL = 0, trap_instruction_19 */
447
.org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE
1870 jermar 448
.global trap_instruction_19_tl0
449
trap_instruction_19_tl0:
1862 jermar 450
	TRAP_INSTRUCTION 19
451
 
452
/* TT = 0x114, TL = 0, trap_instruction_20 */
453
.org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE
1870 jermar 454
.global trap_instruction_20_tl0
455
trap_instruction_20_tl0:
1862 jermar 456
	TRAP_INSTRUCTION 20
457
 
458
/* TT = 0x115, TL = 0, trap_instruction_21 */
459
.org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE
1870 jermar 460
.global trap_instruction_21_tl0
461
trap_instruction_21_tl0:
1862 jermar 462
	TRAP_INSTRUCTION 21
463
 
464
/* TT = 0x116, TL = 0, trap_instruction_22 */
465
.org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE
1870 jermar 466
.global trap_instruction_22_tl0
467
trap_instruction_22_tl0:
1862 jermar 468
	TRAP_INSTRUCTION 22
469
 
470
/* TT = 0x117, TL = 0, trap_instruction_23 */
471
.org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE
1870 jermar 472
.global trap_instruction_23_tl0
473
trap_instruction_23_tl0:
1862 jermar 474
	TRAP_INSTRUCTION 23
475
 
476
/* TT = 0x118, TL = 0, trap_instruction_24 */
477
.org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE
1870 jermar 478
.global trap_instruction_24_tl0
479
trap_instruction_24_tl0:
1862 jermar 480
	TRAP_INSTRUCTION 24
481
 
482
/* TT = 0x119, TL = 0, trap_instruction_25 */
483
.org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE
1870 jermar 484
.global trap_instruction_25_tl0
485
trap_instruction_25_tl0:
1862 jermar 486
	TRAP_INSTRUCTION 25
487
 
488
/* TT = 0x11a, TL = 0, trap_instruction_26 */
489
.org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE
1870 jermar 490
.global trap_instruction_26_tl0
491
trap_instruction_26_tl0:
1862 jermar 492
	TRAP_INSTRUCTION 26
493
 
494
/* TT = 0x11b, TL = 0, trap_instruction_27 */
495
.org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE
1870 jermar 496
.global trap_instruction_27_tl0
497
trap_instruction_27_tl0:
1862 jermar 498
	TRAP_INSTRUCTION 27
499
 
500
/* TT = 0x11c, TL = 0, trap_instruction_28 */
501
.org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE
1870 jermar 502
.global trap_instruction_28_tl0
503
trap_instruction_28_tl0:
1862 jermar 504
	TRAP_INSTRUCTION 28
505
 
506
/* TT = 0x11d, TL = 0, trap_instruction_29 */
507
.org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE
1870 jermar 508
.global trap_instruction_29_tl0
509
trap_instruction_29_tl0:
1862 jermar 510
	TRAP_INSTRUCTION 29
511
 
512
/* TT = 0x11e, TL = 0, trap_instruction_30 */
513
.org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE
1870 jermar 514
.global trap_instruction_30_tl0
515
trap_instruction_30_tl0:
1862 jermar 516
	TRAP_INSTRUCTION 30
517
 
518
/* TT = 0x11f, TL = 0, trap_instruction_31 */
519
.org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE
1870 jermar 520
.global trap_instruction_31_tl0
521
trap_instruction_31_tl0:
1862 jermar 522
	TRAP_INSTRUCTION 31
523
 
529 jermar 524
/*
663 jermar 525
 * Handlers for TL>0.
529 jermar 526
 */
527
 
667 jermar 528
/* TT = 0x08, TL > 0, instruction_access_exception */
529
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
1870 jermar 530
.global instruction_access_exception_tl1
531
instruction_access_exception_tl1:
532
	wrpr %g0, 1, %tl
533
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
534
	PREEMPTIBLE_HANDLER instruction_access_exception
667 jermar 535
 
1870 jermar 536
/* TT = 0x0a, TL > 0, instruction_access_error */
537
.org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE
538
.global instruction_access_error_tl1
539
instruction_access_error_tl1:
540
	wrpr %g0, 1, %tl
541
	PREEMPTIBLE_HANDLER instruction_access_error
542
 
883 jermar 543
/* TT = 0x10, TL > 0, illegal_instruction */
544
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
1870 jermar 545
.global illegal_instruction_tl1
546
illegal_instruction_tl1:
547
	wrpr %g0, 1, %tl
548
	PREEMPTIBLE_HANDLER illegal_instruction
883 jermar 549
 
663 jermar 550
/* TT = 0x24, TL > 0, clean_window handler */
551
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
1882 jermar 552
.global clean_window_tl1
553
clean_window_tl1:
663 jermar 554
	CLEAN_WINDOW_HANDLER
529 jermar 555
 
1870 jermar 556
/* TT = 0x28, TL > 0, division_by_zero */
557
.org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE
558
.global division_by_zero_tl1
559
division_by_zero_tl1:
560
	wrpr %g0, 1, %tl
561
	PREEMPTIBLE_HANDLER division_by_zero
562
 
563
/* TT = 0x30, TL > 0, data_access_exception */
564
.org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE
565
.global data_access_exception_tl1
566
data_access_exception_tl1:
567
	wrpr %g0, 1, %tl
568
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
569
	PREEMPTIBLE_HANDLER data_access_exception
570
 
897 jermar 571
/* TT = 0x32, TL > 0, data_access_error */
572
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
1870 jermar 573
.global data_access_error_tl1
574
data_access_error_tl1:
575
	wrpr %g0, 1, %tl
576
	PREEMPTIBLE_HANDLER data_access_error
897 jermar 577
 
667 jermar 578
/* TT = 0x34, TL > 0, mem_address_not_aligned */
579
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
1870 jermar 580
.global mem_address_not_aligned_tl1
581
mem_address_not_aligned_tl1:
582
	wrpr %g0, 1, %tl
583
	PREEMPTIBLE_HANDLER mem_address_not_aligned
529 jermar 584
 
863 jermar 585
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
586
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
1870 jermar 587
.global fast_data_access_mmu_miss_handler_tl1
588
fast_data_access_mmu_miss_handler_tl1:
589
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 1
863 jermar 590
 
591
/* TT = 0x6c, TL > 0, fast_data_access_protection */
592
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
1870 jermar 593
.global fast_data_access_protection_handler_tl1
594
fast_data_access_protection_handler_tl1:
595
	FAST_DATA_ACCESS_PROTECTION_HANDLER 1
863 jermar 596
 
663 jermar 597
/* TT = 0x80, TL > 0, spill_0_normal handler */
598
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
1870 jermar 599
.global spill_0_normal_tl1
600
spill_0_normal_tl1:
1852 jermar 601
	SPILL_NORMAL_HANDLER_KERNEL
529 jermar 602
 
1856 jermar 603
/* TT = 0x88, TL > 0, spill_2_normal handler */
604
.org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE
1870 jermar 605
.global spill_2_normal_tl1
606
spill_2_normal_tl1:
1856 jermar 607
	SPILL_TO_USPACE_WINDOW_BUFFER
608
 
609
/* TT = 0xa0, TL > 0, spill_0_other handler */
610
.org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE
1870 jermar 611
.global spill_0_other_tl1
612
spill_0_other_tl1:
1856 jermar 613
	SPILL_TO_USPACE_WINDOW_BUFFER
614
 
663 jermar 615
/* TT = 0xc0, TL > 0, fill_0_normal handler */
616
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
1870 jermar 617
.global fill_0_normal_tl1
618
fill_0_normal_tl1:
1852 jermar 619
	FILL_NORMAL_HANDLER_KERNEL
634 jermar 620
 
1862 jermar 621
#define NOT(x)	((x) == 0)
663 jermar 622
 
1851 jermar 623
/* Preemptible trap handler for TL=1.
666 jermar 624
 *
1851 jermar 625
 * This trap handler makes arrangements to make calling of scheduler() from
1852 jermar 626
 * within a trap context possible. It is called from several other trap
627
 * handlers.
667 jermar 628
 *
1852 jermar 629
 * This function can be entered either with interrupt globals or alternate globals.
630
 * Memory management trap handlers are obliged to switch to one of those global sets
631
 * prior to calling this function. Register window management functions are not
632
 * allowed to modify the alternate global registers.
667 jermar 633
 *
666 jermar 634
 * Input registers:
1852 jermar 635
 *	%g1		Address of function to call.
1863 jermar 636
 * 	%g2	 	First argument for the function.
1852 jermar 637
 *	%g6		Pre-set as kernel stack base if trap from userspace.
1856 jermar 638
 *	%g7		Pre-set as address of the userspace window buffer.
666 jermar 639
 */
1862 jermar 640
.macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall
1865 jermar 641
	/*
642
	 * ASSERT(%tl == 1)
643
	 */
644
	rdpr %tl, %g3
645
	cmp %g3, 1
646
	be 1f
647
	nop
1876 jermar 648
0:	ba 0b					! this is for debugging, if we ever get here
1865 jermar 649
	nop					! it will be easy to find
650
 
651
1:
1862 jermar 652
.if NOT(\is_syscall)
1852 jermar 653
	rdpr %tstate, %g3
1876 jermar 654
 
655
	/*
656
	 * One of the ways this handler can be invoked is after a nested MMU trap from
657
	 * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate
658
	 * the CWP register. We deal with the situation by simulating the MMU trap
659
	 * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU
660
	 * trap is resolved. However, because we are in the wrong window from the
661
	 * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0.
662
	 */ 
663
	and %g3, TSTATE_CWP_MASK, %g4
664
	wrpr %g4, 0, %cwp			! resynchronize CWP
665
 
1852 jermar 666
	andcc %g3, TSTATE_PRIV_BIT, %g0		! if this trap came from the privileged mode...
667
	bnz 0f					! ...skip setting of kernel stack and primary context
668
	nop
1876 jermar 669
 
1862 jermar 670
.endif
667 jermar 671
	/*
1857 jermar 672
	 * Normal window spills will go to the userspace window buffer.
673
	 */
674
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate
675
 
1917 jermar 676
	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent unnecessary clean_window exceptions
1865 jermar 677
 
1857 jermar 678
	/*
1852 jermar 679
	 * Switch to kernel stack. The old stack is
680
	 * automatically saved in the old window's %sp
681
	 * and the new window's %fp.
667 jermar 682
	 */
1852 jermar 683
	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
684
 
1862 jermar 685
.if \is_syscall
1852 jermar 686
	/*
1862 jermar 687
	 * Copy arguments for the syscall to the new window.
688
	 */
689
	mov %i0, %o2
690
	mov %i1, %o3
691
	mov %i2, %o4
692
	mov %i3, %o5
693
.endif
694
 
695
	/*
1864 jermar 696
	 * Mark the CANRESTORE windows as OTHER windows.
1852 jermar 697
	 */
1864 jermar 698
	rdpr %canrestore, %l0
1852 jermar 699
	wrpr %l0, %otherwin
1864 jermar 700
	wrpr %g0, %canrestore
1852 jermar 701
 
702
	/*
703
	 * Switch to primary context 0.
704
	 */
705
	mov VA_PRIMARY_CONTEXT_REG, %l0
1860 jermar 706
	stxa %g0, [%l0] ASI_DMMU
707
	rd %pc, %l0
708
	flush %l0
1852 jermar 709
 
1862 jermar 710
.if NOT(\is_syscall)
1852 jermar 711
	ba 1f
712
	nop
713
0:
714
	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
715
 
716
	/*
717
	 * At this moment, we are using the kernel stack 
718
	 * and have successfully allocated a register window.
719
	 */
720
1:
1862 jermar 721
.endif
1852 jermar 722
	/*
1857 jermar 723
	 * Other window spills will go to the userspace window buffer
724
	 * and normal spills will go to the kernel stack.
725
	 */
726
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate
727
 
728
	/*
1852 jermar 729
	 * Copy arguments.
730
	 */
731
	mov %g1, %l0
732
	mov %g2, %o0
733
 
734
	/*
735
	 * Save TSTATE, TPC and TNPC aside.
736
	 */
667 jermar 737
	rdpr %tstate, %g1
738
	rdpr %tpc, %g2
739
	rdpr %tnpc, %g3
1916 jermar 740
	rd %y, %g4
667 jermar 741
 
1851 jermar 742
	/*
743
	 * The following memory accesses will not fault
744
	 * because special provisions are made to have
745
	 * the kernel stack of THREAD locked in DTLB.
746
	 */
1852 jermar 747
	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
748
	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
749
	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
1915 jermar 750
 
751
	/*
752
	 * Save the Y register.
753
	 * This register is deprecated according to SPARC V9 specification
754
	 * and is only present for backward compatibility with previous
755
	 * versions of the SPARC architecture.
756
	 * Surprisingly, gcc makes use of this register without a notice.
757
	 */
758
	stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y]
667 jermar 759
 
760
	wrpr %g0, 0, %tl
1882 jermar 761
	wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate
666 jermar 762
	SAVE_GLOBALS
667 jermar 763
 
764
	/*
1852 jermar 765
	 * Call the higher-level handler and pass istate as second parameter.
667 jermar 766
	 */
666 jermar 767
	call %l0
1852 jermar 768
	add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
769
 
1862 jermar 770
.if \is_syscall
771
	/*
772
	 * Copy the value returned by the syscall.
773
	 */
774
	mov %o0, %i0
775
.endif
776
 
1852 jermar 777
	RESTORE_GLOBALS
1882 jermar 778
	rdpr %pstate, %l1			! we must preserve the PEF bit
1852 jermar 779
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
780
	wrpr %g0, 1, %tl
667 jermar 781
 
782
	/*
1852 jermar 783
	 * Read TSTATE, TPC and TNPC from saved copy.
667 jermar 784
	 */
1852 jermar 785
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
786
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
787
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
788
 
667 jermar 789
	/*
1882 jermar 790
	 * Copy PSTATE.PEF to the in-register copy of TSTATE.
791
	 */
792
	and %l1, PSTATE_PEF_BIT, %l1
793
	sllx %l1, TSTATE_PSTATE_SHIFT, %l1
794
	sethi %hi(TSTATE_PEF_BIT), %g4
795
	andn %g1, %g4, %g1
796
	or %g1, %l1, %g1
797
 
798
	/*
1852 jermar 799
	 * Restore TSTATE, TPC and TNPC from saved copies.
667 jermar 800
	 */
1852 jermar 801
	wrpr %g1, 0, %tstate
802
	wrpr %g2, 0, %tpc
803
	wrpr %g3, 0, %tnpc
804
 
1916 jermar 805
	/*
806
	 * Restore Y.
807
	 */
808
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
809
	wr %g4, %y
1882 jermar 810
 
667 jermar 811
	/*
1852 jermar 812
	 * If OTHERWIN is zero, then all the userspace windows have been
1864 jermar 813
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
814
	 * if the scheduler was called in the meantime, all valid windows
815
	 * belonging to other threads were spilled by context_restore().
816
	 * If OTHERWIN is non-zero, then some userspace windows are still
1852 jermar 817
	 * valid. Others might have been spilled. However, the CWP pointer
818
	 * needs no fixing because the scheduler had not been called.
667 jermar 819
	 */
1852 jermar 820
	rdpr %otherwin, %l0
821
	brnz %l0, 0f
822
	nop
823
 
667 jermar 824
	/*
1852 jermar 825
	 * OTHERWIN == 0
667 jermar 826
	 */
827
 
828
	/*
1852 jermar 829
	 * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.
667 jermar 830
	 */
1852 jermar 831
	and %g1, TSTATE_CWP_MASK, %l0
832
	inc %l0
1917 jermar 833
	and %l0, NWINDOWS - 1, %l0	! %l0 mod NWINDOWS
1852 jermar 834
	rdpr %cwp, %l1
835
	cmp %l0, %l1
836
	bz 0f				! CWP is ok
837
	nop
667 jermar 838
 
839
	/*
1852 jermar 840
	 * Fix CWP.
1864 jermar 841
	 * In order to recapitulate, the input registers in the current
842
	 * window are the output registers of the window to which we want
843
	 * to restore. Because the fill trap fills only input and local
1855 jermar 844
	 * registers of a window, we need to preserve those output
845
	 * registers manually.
667 jermar 846
	 */
1857 jermar 847
	mov %sp, %g2
1855 jermar 848
	stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
849
	stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
850
	stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
851
	stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
852
	stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
853
	stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
854
	stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
855
	stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
1852 jermar 856
	wrpr %l0, 0, %cwp
1857 jermar 857
	mov %g2, %sp
1855 jermar 858
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
859
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
860
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
861
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
862
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
863
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
864
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
865
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
866
 
667 jermar 867
	/*
1852 jermar 868
	 * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
1880 jermar 869
	 * The CWP has already been restored to the value it had after the SAVE
1857 jermar 870
	 * at the beginning of this function.
667 jermar 871
	 */
1852 jermar 872
0:
1862 jermar 873
.if NOT(\is_syscall)
1857 jermar 874
	rdpr %tstate, %g1
875
	andcc %g1, TSTATE_PRIV_BIT, %g0		! if we are not returning to userspace...,
876
	bnz 1f					! ...skip restoring userspace windows
877
	nop
1862 jermar 878
.endif
1858 jermar 879
 
880
	/*
881
	 * Spills and fills will be processed by the {spill,fill}_1_normal
882
	 * handlers.
883
	 */
884
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate
1860 jermar 885
 
886
	/*
887
	 * Set primary context according to secondary context.
888
	 */
889
	wr %g0, ASI_DMMU, %asi
890
	ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1
891
	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi
1865 jermar 892
	rd %pc, %g1
893
	flush %g1
1857 jermar 894
 
895
	rdpr %cwp, %g1
896
	rdpr %otherwin, %g2
1852 jermar 897
 
1857 jermar 898
	/*
899
	 * Skip all OTHERWIN windows and descend to the first window
900
	 * in the userspace window buffer.
901
	 */
902
	sub %g1, %g2, %g3
903
	dec %g3
1917 jermar 904
	and %g3, NWINDOWS - 1, %g3
1857 jermar 905
	wrpr %g3, 0, %cwp
906
 
907
	/*
908
	 * CWP is now in the window last saved in the userspace window buffer.
909
	 * Fill all windows stored in the buffer.
910
	 */
911
	clr %g4
1864 jermar 912
	set PAGE_SIZE - 1, %g5
913
0:	andcc %g7, %g5, %g0			! PAGE_SIZE alignment check
1857 jermar 914
	bz 0f					! %g7 is page-aligned, no more windows to refill
915
	nop
916
 
917
	add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7
918
	ldx [%g7 + L0_OFFSET], %l0
919
	ldx [%g7 + L1_OFFSET], %l1
920
	ldx [%g7 + L2_OFFSET], %l2
921
	ldx [%g7 + L3_OFFSET], %l3
922
	ldx [%g7 + L4_OFFSET], %l4
923
	ldx [%g7 + L5_OFFSET], %l5
924
	ldx [%g7 + L6_OFFSET], %l6
925
	ldx [%g7 + L7_OFFSET], %l7
926
	ldx [%g7 + I0_OFFSET], %i0
927
	ldx [%g7 + I1_OFFSET], %i1
928
	ldx [%g7 + I2_OFFSET], %i2
929
	ldx [%g7 + I3_OFFSET], %i3
930
	ldx [%g7 + I4_OFFSET], %i4
931
	ldx [%g7 + I5_OFFSET], %i5
932
	ldx [%g7 + I6_OFFSET], %i6
933
	ldx [%g7 + I7_OFFSET], %i7
934
 
935
	dec %g3
1917 jermar 936
	and %g3, NWINDOWS - 1, %g3
1857 jermar 937
	wrpr %g3, 0, %cwp			! switch to the preceeding window
938
 
939
	ba 0b
940
	inc %g4
941
 
942
0:
943
	/*
944
	 * Switch back to the proper current window and adjust
945
	 * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN.
946
	 */
947
	wrpr %g1, 0, %cwp
948
	add %g4, %g2, %g2
1917 jermar 949
	cmp %g2, NWINDOWS - 2
950
	bg 2f					! fix the CANRESTORE=NWINDOWS-1 anomaly
951
	mov NWINDOWS - 2, %g1			! use dealy slot for both cases
1857 jermar 952
	sub %g1, %g2, %g1
953
 
954
	wrpr %g0, 0, %otherwin
1917 jermar 955
	wrpr %g1, 0, %cansave			! NWINDOWS - 2 - CANRESTORE
1857 jermar 956
	wrpr %g2, 0, %canrestore		! OTHERWIN + windows in the buffer
957
	wrpr %g2, 0, %cleanwin			! avoid information leak
958
 
1858 jermar 959
1:
960
	restore
1862 jermar 961
 
962
.if \is_syscall
963
	done
964
.else
1858 jermar 965
	retry
1862 jermar 966
.endif
1858 jermar 967
 
1857 jermar 968
	/*
1858 jermar 969
	 * We got here in order to avoid inconsistency of the window state registers.
970
	 * If the:
971
	 *
972
	 * 	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
973
	 *
974
	 * instruction trapped and spilled a register window into the userspace
1917 jermar 975
	 * window buffer, we have just restored NWINDOWS - 1 register windows.
1858 jermar 976
	 * However, CANRESTORE can be only NWINDOW - 2 at most.
977
	 *
1917 jermar 978
	 * The solution is to manually switch to (CWP - 1) mod NWINDOWS
1858 jermar 979
	 * and set the window state registers so that:
980
	 *
1917 jermar 981
	 * 	CANRESTORE 	= NWINDOWS - 2
982
	 *	CLEANWIN	= NWINDOWS - 2
1858 jermar 983
	 *	CANSAVE 	= 0
984
	 *	OTHERWIN	= 0
985
	 *
1876 jermar 986
	 * The RESTORE instruction is therfore to be skipped.
1857 jermar 987
	 */
1858 jermar 988
2:
989
	wrpr %g0, 0, %otherwin
990
	wrpr %g0, 0, %cansave
991
	wrpr %g1, 0, %canrestore
992
	wrpr %g1, 0, %cleanwin
1857 jermar 993
 
1858 jermar 994
	rdpr %cwp, %g1
995
	dec %g1
1917 jermar 996
	and %g1, NWINDOWS - 1, %g1
1858 jermar 997
	wrpr %g1, 0, %cwp			! CWP--
998
 
1862 jermar 999
.if \is_syscall
1000
	done
1001
.else
666 jermar 1002
	retry
1862 jermar 1003
.endif
1004
 
1005
.endm
1006
 
1007
.global preemptible_handler
1008
preemptible_handler:
1009
	PREEMPTIBLE_HANDLER_TEMPLATE 0
1010
 
1011
.global trap_instruction_handler
1012
trap_instruction_handler:
1013
	PREEMPTIBLE_HANDLER_TEMPLATE 1