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418 | jermar | 1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
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3 | # All rights reserved. |
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4 | # |
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5 | # Redistribution and use in source and binary forms, with or without |
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6 | # modification, are permitted provided that the following conditions |
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7 | # are met: |
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8 | # |
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9 | # - Redistributions of source code must retain the above copyright |
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10 | # notice, this list of conditions and the following disclaimer. |
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11 | # - Redistributions in binary form must reproduce the above copyright |
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12 | # notice, this list of conditions and the following disclaimer in the |
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13 | # documentation and/or other materials provided with the distribution. |
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14 | # - The name of the author may not be used to endorse or promote products |
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15 | # derived from this software without specific prior written permission. |
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16 | # |
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | # |
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28 | |||
1789 | jermar | 29 | #include <arch/regdef.h> |
1823 | jermar | 30 | #include <arch/boot/boot.h> |
846 | jermar | 31 | |
1823 | jermar | 32 | #include <arch/mm/mmu.h> |
33 | #include <arch/mm/tlb.h> |
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34 | #include <arch/mm/tte.h> |
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35 | |||
426 | jermar | 36 | .register %g2, #scratch |
37 | .register %g3, #scratch |
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38 | |||
418 | jermar | 39 | .section K_TEXT_START, "ax" |
40 | |||
847 | jermar | 41 | /* |
1789 | jermar | 42 | * Here is where the kernel is passed control |
43 | * from the boot loader. |
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1790 | jermar | 44 | * |
45 | * The registers are expected to be in this state: |
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1792 | jermar | 46 | * - %o0 bootinfo structure address |
47 | * - %o1 bootinfo structure size |
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48 | * |
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49 | * Moreover, we depend on boot having established the |
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50 | * following environment: |
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51 | * - TLBs are on |
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52 | * - identity mapping for the kernel image |
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53 | * - identity mapping for memory stack |
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847 | jermar | 54 | */ |
55 | |||
418 | jermar | 56 | .global kernel_image_start |
57 | kernel_image_start: |
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846 | jermar | 58 | |
1790 | jermar | 59 | /* |
1823 | jermar | 60 | * Setup basic runtime environment. |
1790 | jermar | 61 | */ |
424 | jermar | 62 | |
1823 | jermar | 63 | flushw ! flush all but the active register window |
64 | wrpr %g0, 0, %tl ! TL = 0, primary context register is used |
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65 | |||
66 | ! Disable interrupts and disable 32-bit address masking. |
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67 | rdpr %pstate, %g1 |
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68 | and %g1, ~(PSTATE_AM_BIT|PSTATE_IE_BIT), %g1 |
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69 | wrpr %g1, 0, %pstate |
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70 | |||
1860 | jermar | 71 | wrpr %g0, 0, %pil ! intialize %pil |
1823 | jermar | 72 | |
1790 | jermar | 73 | /* |
74 | * Copy the bootinfo structure passed from the boot loader |
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75 | * to the kernel bootinfo structure. |
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76 | */ |
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77 | mov %o1, %o2 |
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78 | mov %o0, %o1 |
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79 | set bootinfo, %o0 |
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80 | call memcpy |
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867 | jermar | 81 | nop |
82 | |||
1792 | jermar | 83 | /* |
1823 | jermar | 84 | * Switch to kernel trap table. |
85 | */ |
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86 | set trap_table, %g1 |
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87 | wrpr %g1, 0, %tba |
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88 | |||
89 | /* |
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90 | * Take over the DMMU by installing global locked |
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91 | * TTE entry identically mapping the first 4M |
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92 | * of memory. |
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1792 | jermar | 93 | * |
1823 | jermar | 94 | * In case of DMMU, no FLUSH instructions need to be |
95 | * issued. Because of that, the old DTLB contents can |
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96 | * be demapped pretty straightforwardly and without |
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97 | * causing any traps. |
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1792 | jermar | 98 | */ |
99 | |||
1823 | jermar | 100 | wr %g0, ASI_DMMU, %asi |
895 | jermar | 101 | |
1823 | jermar | 102 | #define SET_TLB_DEMAP_CMD(r1, context_id) \ |
103 | set (TLB_DEMAP_CONTEXT<<TLB_DEMAP_TYPE_SHIFT) | (context_id<<TLB_DEMAP_CONTEXT_SHIFT), %r1 |
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104 | |||
105 | ! demap context 0 |
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106 | SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS) |
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107 | stxa %g0, [%g1] ASI_DMMU_DEMAP |
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108 | membar #Sync |
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109 | |||
110 | #define SET_TLB_TAG(r1, context) \ |
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111 | set VMA | (context<<TLB_TAG_ACCESS_CONTEXT_SHIFT), %r1 |
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112 | |||
113 | ! write DTLB tag |
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114 | SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL) |
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115 | stxa %g1, [VA_DMMU_TAG_ACCESS] %asi |
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116 | membar #Sync |
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117 | |||
118 | #define SET_TLB_DATA(r1, r2, imm) \ |
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119 | set TTE_L | TTE_CP | TTE_P | TTE_W | LMA | imm, %r1; \ |
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120 | set PAGESIZE_4M, %r2; \ |
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121 | sllx %r2, TTE_SIZE_SHIFT, %r2; \ |
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122 | or %r1, %r2, %r1; \ |
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123 | set 1, %r2; \ |
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124 | sllx %r2, TTE_V_SHIFT, %r2; \ |
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125 | or %r1, %r2, %r1; |
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126 | |||
127 | ! write DTLB data and install the kernel mapping |
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128 | SET_TLB_DATA(g1, g2, TTE_G) |
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129 | stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG |
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130 | membar #Sync |
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131 | |||
132 | /* |
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133 | * Now is time to take over the IMMU. |
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134 | * Unfortunatelly, it cannot be done as easily as the DMMU, |
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135 | * because the IMMU is mapping the code it executes. |
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136 | * |
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137 | * [ Note that brave experiments with disabling the IMMU |
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138 | * and using the DMMU approach failed after a dozen |
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139 | * of desparate days with only little success. ] |
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140 | * |
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141 | * The approach used here is inspired from OpenBSD. |
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142 | * First, the kernel creates IMMU mapping for itself |
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143 | * in context 1 (MEM_CONTEXT_TEMP) and switches to |
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144 | * it. Context 0 (MEM_CONTEXT_KERNEL) can be demapped |
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145 | * afterwards and replaced with the kernel permanent |
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146 | * mapping. Finally, the kernel switches back to |
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147 | * context 0 and demaps context 1. |
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148 | * |
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149 | * Moreover, the IMMU requires use of the FLUSH instructions. |
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150 | * But that is OK because we always use operands with |
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151 | * addresses already mapped by the taken over DTLB. |
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152 | */ |
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153 | |||
1852 | jermar | 154 | set kernel_image_start, %g5 |
1823 | jermar | 155 | |
156 | ! write ITLB tag of context 1 |
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157 | SET_TLB_TAG(g1, MEM_CONTEXT_TEMP) |
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158 | set VA_DMMU_TAG_ACCESS, %g2 |
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159 | stxa %g1, [%g2] ASI_IMMU |
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1852 | jermar | 160 | flush %g5 |
1823 | jermar | 161 | |
162 | ! write ITLB data and install the temporary mapping in context 1 |
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163 | SET_TLB_DATA(g1, g2, 0) ! use non-global mapping |
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164 | stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG |
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1852 | jermar | 165 | flush %g5 |
1823 | jermar | 166 | |
167 | ! switch to context 1 |
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168 | set MEM_CONTEXT_TEMP, %g1 |
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169 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!! |
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1852 | jermar | 170 | flush %g5 |
1823 | jermar | 171 | |
172 | ! demap context 0 |
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173 | SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS) |
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174 | stxa %g0, [%g1] ASI_IMMU_DEMAP |
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1852 | jermar | 175 | flush %g5 |
1823 | jermar | 176 | |
177 | ! write ITLB tag of context 0 |
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178 | SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL) |
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179 | set VA_DMMU_TAG_ACCESS, %g2 |
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180 | stxa %g1, [%g2] ASI_IMMU |
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1852 | jermar | 181 | flush %g5 |
1823 | jermar | 182 | |
183 | ! write ITLB data and install the permanent kernel mapping in context 0 |
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184 | SET_TLB_DATA(g1, g2, 0) ! use non-global mapping |
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185 | stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG |
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1852 | jermar | 186 | flush %g5 |
1823 | jermar | 187 | |
188 | ! switch to context 0 |
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189 | stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!! |
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1852 | jermar | 190 | flush %g5 |
1823 | jermar | 191 | |
192 | ! ensure nucleus mapping |
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193 | wrpr %g0, 1, %tl |
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194 | |||
195 | ! set context 1 in the primary context register |
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196 | set MEM_CONTEXT_TEMP, %g1 |
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197 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!! |
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1852 | jermar | 198 | flush %g5 |
1823 | jermar | 199 | |
200 | ! demap context 1 |
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201 | SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY) |
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202 | stxa %g0, [%g1] ASI_IMMU_DEMAP |
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1852 | jermar | 203 | flush %g5 |
1823 | jermar | 204 | |
205 | ! set context 0 in the primary context register |
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206 | stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!! |
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1852 | jermar | 207 | flush %g5 |
1823 | jermar | 208 | |
209 | ! set TL back to 0 |
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210 | wrpr %g0, 0, %tl |
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1864 | jermar | 211 | |
212 | call arch_pre_main |
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213 | nop |
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1823 | jermar | 214 | |
426 | jermar | 215 | call main_bsp |
216 | nop |
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217 | |||
218 | /* Not reached. */ |
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219 | |||
424 | jermar | 220 | 2: |
221 | b 2b |
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222 | nop |