Subversion Repositories HelenOS

Rev

Rev 1905 | Rev 1954 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
418 jermar 1
#
2
# Copyright (C) 2005 Jakub Jermar
3
# All rights reserved.
4
#
5
# Redistribution and use in source and binary forms, with or without
6
# modification, are permitted provided that the following conditions
7
# are met:
8
#
9
# - Redistributions of source code must retain the above copyright
10
#   notice, this list of conditions and the following disclaimer.
11
# - Redistributions in binary form must reproduce the above copyright
12
#   notice, this list of conditions and the following disclaimer in the
13
#   documentation and/or other materials provided with the distribution.
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
16
#
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
#
28
 
1903 jermar 29
#include <arch/arch.h>
1789 jermar 30
#include <arch/regdef.h>
1823 jermar 31
#include <arch/boot/boot.h>
846 jermar 32
 
1823 jermar 33
#include <arch/mm/mmu.h>
34
#include <arch/mm/tlb.h>
35
#include <arch/mm/tte.h>
36
 
1903 jermar 37
#ifdef CONFIG_SMP
38
#include <arch/context_offset.h>
39
#endif
40
 
426 jermar 41
.register %g2, #scratch
42
.register %g3, #scratch
43
 
418 jermar 44
.section K_TEXT_START, "ax"
45
 
847 jermar 46
/*
1789 jermar 47
 * Here is where the kernel is passed control
48
 * from the boot loader.
1790 jermar 49
 * 
50
 * The registers are expected to be in this state:
1900 jermar 51
 * - %o0 non-zero for the bootstrap processor, zero for application/secondary processors
1899 jermar 52
 * - %o1 bootinfo structure address
53
 * - %o2 bootinfo structure size
1792 jermar 54
 *
55
 * Moreover, we depend on boot having established the
56
 * following environment:
57
 * - TLBs are on
58
 * - identity mapping for the kernel image
59
 * - identity mapping for memory stack
847 jermar 60
 */
61
 
418 jermar 62
.global kernel_image_start
63
kernel_image_start:
1900 jermar 64
	mov %o0, %l7
846 jermar 65
 
1790 jermar 66
	/*
1823 jermar 67
	 * Setup basic runtime environment.
1790 jermar 68
	 */
424 jermar 69
 
1881 jermar 70
	flushw					! flush all but the active register window
1823 jermar 71
 
1881 jermar 72
	wrpr %g0, 0, %tl			! TL = 0, primary context register is used
1823 jermar 73
 
1881 jermar 74
	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! Disable interrupts and disable 32-bit address masking.
1823 jermar 75
 
1881 jermar 76
	wrpr %g0, 0, %pil			! intialize %pil
77
 
1790 jermar 78
	/*
1823 jermar 79
	 * Switch to kernel trap table.
80
	 */
1880 jermar 81
	sethi %hi(trap_table), %g1
82
	wrpr %g1, %lo(trap_table), %tba
1823 jermar 83
 
84
	/* 
85
	 * Take over the DMMU by installing global locked
86
	 * TTE entry identically mapping the first 4M
87
	 * of memory.
1792 jermar 88
	 *
1823 jermar 89
	 * In case of DMMU, no FLUSH instructions need to be
90
	 * issued. Because of that, the old DTLB contents can
91
	 * be demapped pretty straightforwardly and without
92
	 * causing any traps.
1792 jermar 93
	 */
94
 
1823 jermar 95
	wr %g0, ASI_DMMU, %asi
895 jermar 96
 
1823 jermar 97
#define SET_TLB_DEMAP_CMD(r1, context_id) \
98
	set (TLB_DEMAP_CONTEXT<<TLB_DEMAP_TYPE_SHIFT) | (context_id<<TLB_DEMAP_CONTEXT_SHIFT), %r1
99
 
100
	! demap context 0
101
	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
102
	stxa %g0, [%g1] ASI_DMMU_DEMAP			
103
	membar #Sync
104
 
105
#define SET_TLB_TAG(r1, context) \
106
	set VMA | (context<<TLB_TAG_ACCESS_CONTEXT_SHIFT), %r1
107
 
108
	! write DTLB tag
109
	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
110
	stxa %g1, [VA_DMMU_TAG_ACCESS] %asi			
111
	membar #Sync
112
 
113
#define SET_TLB_DATA(r1, r2, imm) \
1887 jermar 114
	set TTE_CV | TTE_CP | TTE_P | LMA | imm, %r1; \
1823 jermar 115
	set PAGESIZE_4M, %r2; \
116
	sllx %r2, TTE_SIZE_SHIFT, %r2; \
117
	or %r1, %r2, %r1; \
1880 jermar 118
	mov 1, %r2; \
1823 jermar 119
	sllx %r2, TTE_V_SHIFT, %r2; \
120
	or %r1, %r2, %r1;
121
 
122
	! write DTLB data and install the kernel mapping
1887 jermar 123
	SET_TLB_DATA(g1, g2, TTE_L | TTE_W)	! use non-global mapping
1823 jermar 124
	stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG		
125
	membar #Sync
1868 jermar 126
 
127
	/*
128
	 * Because we cannot use global mappings (because we want to
129
	 * have separate 64-bit address spaces for both the kernel
130
	 * and the userspace), we prepare the identity mapping also in
131
	 * context 1. This step is required by the
132
	 * code installing the ITLB mapping.
133
	 */
134
	! write DTLB tag of context 1 (i.e. MEM_CONTEXT_TEMP)
135
	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
136
	stxa %g1, [VA_DMMU_TAG_ACCESS] %asi			
137
	membar #Sync
138
 
139
	! write DTLB data and install the kernel mapping in context 1
1887 jermar 140
	SET_TLB_DATA(g1, g2, TTE_W)			! use non-global mapping
1868 jermar 141
	stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG		
142
	membar #Sync
1823 jermar 143
 
144
	/*
145
	 * Now is time to take over the IMMU.
146
	 * Unfortunatelly, it cannot be done as easily as the DMMU,
147
	 * because the IMMU is mapping the code it executes.
148
	 *
149
	 * [ Note that brave experiments with disabling the IMMU
150
	 * and using the DMMU approach failed after a dozen
151
	 * of desparate days with only little success. ]
152
	 *
153
	 * The approach used here is inspired from OpenBSD.
154
	 * First, the kernel creates IMMU mapping for itself
155
	 * in context 1 (MEM_CONTEXT_TEMP) and switches to
156
	 * it. Context 0 (MEM_CONTEXT_KERNEL) can be demapped
157
	 * afterwards and replaced with the kernel permanent
158
	 * mapping. Finally, the kernel switches back to
159
	 * context 0 and demaps context 1.
160
	 *
161
	 * Moreover, the IMMU requires use of the FLUSH instructions.
162
	 * But that is OK because we always use operands with
163
	 * addresses already mapped by the taken over DTLB.
164
	 */
165
 
1852 jermar 166
	set kernel_image_start, %g5
1823 jermar 167
 
168
	! write ITLB tag of context 1
169
	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
1880 jermar 170
	mov VA_DMMU_TAG_ACCESS, %g2
1823 jermar 171
	stxa %g1, [%g2] ASI_IMMU
1852 jermar 172
	flush %g5
1823 jermar 173
 
174
	! write ITLB data and install the temporary mapping in context 1
175
	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
176
	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG		
1852 jermar 177
	flush %g5
1823 jermar 178
 
179
	! switch to context 1
1880 jermar 180
	mov MEM_CONTEXT_TEMP, %g1
1823 jermar 181
	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
1852 jermar 182
	flush %g5
1823 jermar 183
 
184
	! demap context 0
185
	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
186
	stxa %g0, [%g1] ASI_IMMU_DEMAP			
1852 jermar 187
	flush %g5
1823 jermar 188
 
189
	! write ITLB tag of context 0
190
	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
1880 jermar 191
	mov VA_DMMU_TAG_ACCESS, %g2
1823 jermar 192
	stxa %g1, [%g2] ASI_IMMU
1852 jermar 193
	flush %g5
1823 jermar 194
 
195
	! write ITLB data and install the permanent kernel mapping in context 0
1887 jermar 196
	SET_TLB_DATA(g1, g2, TTE_L)		! use non-global mapping
1823 jermar 197
	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG		
1852 jermar 198
	flush %g5
1823 jermar 199
 
1906 jermar 200
	! enter nucleus - using context 0
1823 jermar 201
	wrpr %g0, 1, %tl
202
 
203
	! demap context 1
204
	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)
205
	stxa %g0, [%g1] ASI_IMMU_DEMAP			
1852 jermar 206
	flush %g5
1823 jermar 207
 
208
	! set context 0 in the primary context register
209
	stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
1852 jermar 210
	flush %g5
1823 jermar 211
 
1906 jermar 212
	! leave nucleus - using primary context, i.e. context 0
1823 jermar 213
	wrpr %g0, 0, %tl
1864 jermar 214
 
1903 jermar 215
	brz %l7, 1f				! skip if you are not the bootstrap CPU
216
	nop
1900 jermar 217
 
1906 jermar 218
	sethi %hi(bootinfo), %o0
219
	call memcpy				! copy bootinfo
220
	or %o0, %lo(bootinfo), %o0
221
 
1864 jermar 222
	call arch_pre_main
223
	nop
1823 jermar 224
 
426 jermar 225
	call main_bsp
226
	nop
227
 
228
	/* Not reached. */
229
 
1903 jermar 230
0:
231
	ba 0b
232
	nop
233
 
234
 
235
	/*
236
	 * Read MID from the processor.
237
	 */
238
1:
239
	ldxa [%g0] ASI_UPA_CONFIG, %g1
240
	srlx %g1, UPA_CONFIG_MID_SHIFT, %g1
241
	and %g1, UPA_CONFIG_MID_MASK, %g1
242
 
1905 jermar 243
#ifdef CONFIG_SMP
1903 jermar 244
	/*
245
	 * Active loop for APs until the BSP picks them up.
246
	 * A processor cannot leave the loop until the
247
	 * global variable 'waking_up_mid' equals its
248
	 * MID.
249
	 */
250
	set waking_up_mid, %g2
424 jermar 251
2:
1903 jermar 252
	ldx [%g2], %g3
253
	cmp %g3, %g1
254
	bne 2b
424 jermar 255
	nop
1903 jermar 256
 
257
	/*
258
	 * Configure stack for the AP.
259
	 * The AP is expected to use the stack saved
260
	 * in the ctx global variable.
261
	 */
262
	set ctx, %g1
263
	add %g1, OFFSET_SP, %g1
264
	ldx [%g1], %o6
265
 
266
	call main_ap
267
	nop
268
 
269
	/* Not reached. */
1905 jermar 270
#endif
1903 jermar 271
 
272
0:
273
	ba 0b
274
	nop