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2009 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2006 Jakub Jermar |
2009 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | /** @addtogroup sparc64mm |
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30 | * @{ |
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31 | */ |
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32 | /** |
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33 | * @file |
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2134 | jermar | 34 | * @brief D-cache shootdown algorithm. |
2009 | jermar | 35 | */ |
36 | |||
37 | #include <arch/mm/cache.h> |
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38 | |||
2134 | jermar | 39 | #ifdef CONFIG_SMP |
40 | #ifdef CONFIG_VIRT_IDX_DCACHE |
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41 | |||
42 | #include <smp/ipi.h> |
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43 | #include <arch/interrupt.h> |
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44 | #include <synch/spinlock.h> |
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45 | #include <arch.h> |
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46 | #include <debug.h> |
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47 | |||
48 | /** |
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49 | * This spinlock is used by the processors to synchronize during the D-cache |
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50 | * shootdown. |
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51 | */ |
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52 | SPINLOCK_INITIALIZE(dcachelock); |
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53 | |||
54 | /** Initialize the D-cache shootdown sequence. |
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55 | * |
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56 | * Start the shootdown sequence by sending out an IPI and wait until all |
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57 | * processors spin on the dcachelock spinlock. |
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58 | * |
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59 | * @param type Scope of the D-cache shootdown. |
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60 | * @param color Color to be invalidated; applicable only for DCACHE_INVL_COLOR |
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61 | * and DCACHE_INVL_FRAME invalidation types. |
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62 | * @param frame Frame to be invalidated; applicable only for DCACHE_INVL_FRAME |
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63 | * invalidation types. |
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64 | */ |
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65 | void dcache_shootdown_start(dcache_invalidate_type_t type, int color, |
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66 | uintptr_t frame) |
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67 | { |
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68 | int i; |
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69 | |||
70 | CPU->arch.dcache_active = 0; |
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71 | spinlock_lock(&dcachelock); |
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72 | |||
73 | for (i = 0; i < config.cpu_count; i++) { |
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74 | cpu_t *cpu; |
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75 | |||
76 | if (i == CPU->id) |
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77 | continue; |
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78 | |||
79 | cpu = &cpus[i]; |
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80 | spinlock_lock(&cpu->lock); |
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81 | if (cpu->arch.dcache_message_count == |
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82 | DCACHE_MSG_QUEUE_LEN) { |
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83 | /* |
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84 | * The queue is full, flush the cache entirely. |
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85 | */ |
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86 | cpu->arch.dcache_message_count = 1; |
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87 | cpu->arch.dcache_messages[0].type = DCACHE_INVL_ALL; |
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88 | cpu->arch.dcache_messages[0].color = 0; /* ignored */ |
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89 | cpu->arch.dcache_messages[0].frame = 0; /* ignored */ |
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90 | } else { |
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91 | index_t idx = cpu->arch.dcache_message_count++; |
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92 | cpu->arch.dcache_messages[idx].type = type; |
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93 | cpu->arch.dcache_messages[idx].color = color; |
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94 | cpu->arch.dcache_messages[idx].frame = frame; |
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95 | } |
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96 | spinlock_unlock(&cpu->lock); |
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97 | } |
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98 | |||
99 | ipi_broadcast(IPI_DCACHE_SHOOTDOWN); |
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100 | |||
101 | busy_wait: |
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102 | for (i = 0; i < config.cpu_count; i++) |
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103 | if (cpus[i].arch.dcache_active) |
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104 | goto busy_wait; |
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105 | } |
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106 | |||
107 | /** Finish the D-cache shootdown sequence. */ |
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108 | void dcache_shootdown_finalize(void) |
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109 | { |
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110 | spinlock_unlock(&dcachelock); |
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111 | CPU->arch.dcache_active = 1; |
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112 | } |
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113 | |||
114 | /** Process the D-cache shootdown IPI. */ |
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115 | void dcache_shootdown_ipi_recv(void) |
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116 | { |
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117 | int i; |
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118 | |||
119 | ASSERT(CPU); |
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120 | |||
121 | CPU->arch.dcache_active = 0; |
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122 | spinlock_lock(&dcachelock); |
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123 | spinlock_unlock(&dcachelock); |
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124 | |||
125 | spinlock_lock(&CPU->lock); |
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126 | ASSERT(CPU->arch.dcache_message_count < DCACHE_MSG_QUEUE_LEN); |
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127 | for (i = 0; i < CPU->arch.dcache_message_count; i++) { |
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128 | switch (CPU->arch.dcache_messages[i].type) { |
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129 | case DCACHE_INVL_ALL: |
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130 | dcache_flush(); |
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131 | goto flushed; |
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132 | break; |
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133 | case DCACHE_INVL_COLOR: |
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134 | dcache_flush_color(CPU->arch.dcache_messages[i].color); |
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135 | break; |
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136 | case DCACHE_INVL_FRAME: |
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137 | dcache_flush_frame(CPU->arch.dcache_messages[i].color, |
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138 | CPU->arch.dcache_messages[i].frame); |
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139 | break; |
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140 | default: |
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141 | panic("unknown type (%d)\n", |
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142 | CPU->arch.dcache_messages[i].type); |
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143 | } |
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144 | } |
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145 | flushed: |
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146 | CPU->arch.dcache_message_count = 0; |
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147 | spinlock_unlock(&CPU->lock); |
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148 | |||
149 | CPU->arch.dcache_active = 1; |
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150 | } |
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151 | |||
152 | #endif /* CONFIG_VIRT_IDX_DCACHE */ |
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153 | #endif /* CONFIG_SMP */ |
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154 | |||
2009 | jermar | 155 | /** @} |
156 | */ |
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157 |