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756 | jermar | 1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1860 | jermar | 29 | /** @addtogroup sparc64mm |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
756 | jermar | 35 | #include <arch/mm/as.h> |
1860 | jermar | 36 | #include <arch/mm/tlb.h> |
756 | jermar | 37 | #include <genarch/mm/as_ht.h> |
830 | jermar | 38 | #include <genarch/mm/asid_fifo.h> |
1890 | jermar | 39 | #include <debug.h> |
756 | jermar | 40 | |
1890 | jermar | 41 | #ifdef CONFIG_TSB |
42 | #include <arch/mm/tsb.h> |
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43 | #endif |
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44 | |||
756 | jermar | 45 | /** Architecture dependent address space init. */ |
46 | void as_arch_init(void) |
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47 | { |
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48 | as_operations = &as_ht_operations; |
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830 | jermar | 49 | asid_fifo_init(); |
756 | jermar | 50 | } |
1702 | cejka | 51 | |
1890 | jermar | 52 | /** Perform sparc64-specific tasks when an address space becomes active on the processor. |
53 | * |
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54 | * Install ASID and map TSBs. |
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55 | * |
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56 | * @param as Address space. |
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57 | */ |
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1860 | jermar | 58 | void as_install_arch(as_t *as) |
59 | { |
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60 | tlb_context_reg_t ctx; |
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61 | |||
62 | /* |
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1890 | jermar | 63 | * Note that we don't lock the address space. |
64 | * That's correct - we can afford it here |
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65 | * because we only read members that are |
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66 | * currently read-only. |
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67 | */ |
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68 | |||
69 | /* |
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1860 | jermar | 70 | * Write ASID to secondary context register. |
71 | * The primary context register has to be set |
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72 | * from TL>0 so it will be filled from the |
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73 | * secondary context register from the TL=1 |
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74 | * code just before switch to userspace. |
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75 | */ |
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76 | ctx.v = 0; |
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77 | ctx.context = as->asid; |
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78 | mmu_secondary_context_write(ctx.v); |
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1890 | jermar | 79 | |
80 | #ifdef CONFIG_TSB |
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81 | if (as != AS_KERNEL) { |
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82 | uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); |
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83 | |||
84 | ASSERT(as->arch.itsb && as->arch.dtsb); |
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85 | |||
86 | uintptr_t tsb = as->arch.itsb; |
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87 | |||
88 | if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { |
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89 | /* |
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90 | * TSBs were allocated from memory not covered |
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91 | * by the locked 4M kernel DTLB entry. We need |
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92 | * to map both TSBs explicitly. |
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93 | */ |
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94 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb); |
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95 | dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true); |
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96 | } |
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97 | |||
98 | /* |
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99 | * Setup TSB Base registers. |
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100 | */ |
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101 | tsb_base_reg_t tsb_base; |
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102 | |||
103 | tsb_base.value = 0; |
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104 | tsb_base.size = TSB_SIZE; |
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105 | tsb_base.split = 0; |
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106 | |||
107 | tsb_base.base = as->arch.itsb >> PAGE_WIDTH; |
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108 | itsb_base_write(tsb_base.value); |
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109 | tsb_base.base = as->arch.dtsb >> PAGE_WIDTH; |
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110 | dtsb_base_write(tsb_base.value); |
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111 | } |
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112 | #endif |
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1860 | jermar | 113 | } |
114 | |||
1890 | jermar | 115 | /** Perform sparc64-specific tasks when an address space is removed from the processor. |
116 | * |
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117 | * Demap TSBs. |
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118 | * |
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119 | * @param as Address space. |
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120 | */ |
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121 | void as_deinstall_arch(as_t *as) |
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122 | { |
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123 | |||
124 | /* |
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125 | * Note that we don't lock the address space. |
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126 | * That's correct - we can afford it here |
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127 | * because we only read members that are |
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128 | * currently read-only. |
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129 | */ |
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130 | |||
131 | #ifdef CONFIG_TSB |
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132 | if (as != AS_KERNEL) { |
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133 | uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); |
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134 | |||
135 | ASSERT(as->arch.itsb && as->arch.dtsb); |
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136 | |||
137 | uintptr_t tsb = as->arch.itsb; |
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138 | |||
139 | if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { |
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140 | /* |
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141 | * TSBs were allocated from memory not covered |
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142 | * by the locked 4M kernel DTLB entry. We need |
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143 | * to demap the entry installed by as_install_arch(). |
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144 | */ |
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145 | dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb); |
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146 | } |
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147 | |||
148 | } |
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149 | #endif |
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150 | } |
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151 | |||
1860 | jermar | 152 | /** @} |
1702 | cejka | 153 | */ |