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1911 | jermar | 1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | /** @addtogroup sparc64 |
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30 | * @{ |
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31 | */ |
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32 | /** |
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33 | * @file |
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34 | * @brief PCI driver. |
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35 | */ |
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36 | |||
37 | #include <arch/drivers/pci.h> |
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38 | #include <genarch/ofw/ofw_tree.h> |
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39 | #include <arch/trap/interrupt.h> |
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40 | #include <arch/mm/page.h> |
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41 | #include <mm/slab.h> |
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42 | #include <arch/types.h> |
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43 | #include <typedefs.h> |
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44 | #include <debug.h> |
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45 | #include <print.h> |
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46 | #include <func.h> |
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47 | #include <arch/asm.h> |
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48 | |||
49 | #define PCI_SABRE_REGS_REG 0 |
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50 | |||
51 | #define PCI_SABRE_IMAP_BASE 0x200 |
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52 | #define PCI_SABRE_ICLR_BASE 0x300 |
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53 | |||
54 | static pci_t *pci_sabre_init(ofw_tree_node_t *node); |
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55 | static void pci_sabre_enable_interrupt(pci_t *pci, int inr); |
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56 | static void pci_sabre_clear_interrupt(pci_t *pci, int inr); |
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57 | |||
58 | /** PCI operations for Sabre model. */ |
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59 | static pci_operations_t pci_sabre_ops = { |
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60 | .enable_interrupt = pci_sabre_enable_interrupt, |
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61 | .clear_interrupt = pci_sabre_clear_interrupt |
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62 | }; |
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63 | |||
64 | /** Initialize PCI controller (model Sabre). */ |
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65 | pci_t *pci_sabre_init(ofw_tree_node_t *node) |
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66 | { |
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67 | pci_t *pci; |
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68 | ofw_tree_property_t *prop; |
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69 | |||
70 | /* |
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71 | * Get registers. |
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72 | */ |
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73 | prop = ofw_tree_getprop(node, "reg"); |
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74 | if (!prop || !prop->value) |
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75 | return NULL; |
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76 | |||
77 | ofw_upa_reg_t *reg = prop->value; |
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78 | count_t regs = prop->size / sizeof(ofw_upa_reg_t); |
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79 | |||
80 | if (regs < PCI_SABRE_REGS_REG + 1) |
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81 | return NULL; |
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82 | |||
83 | uintptr_t paddr; |
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84 | if (!ofw_upa_apply_ranges(node->parent, ®[PCI_SABRE_REGS_REG], &paddr)) |
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85 | return NULL; |
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86 | |||
87 | pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC); |
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88 | if (!pci) |
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89 | return NULL; |
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90 | |||
91 | pci->model = PCI_SABRE; |
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92 | pci->op = &pci_sabre_ops; |
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93 | pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_SABRE_REGS_REG].size); |
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94 | |||
95 | return pci; |
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96 | } |
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97 | |||
98 | void pci_sabre_enable_interrupt(pci_t *pci, int inr) |
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99 | { |
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100 | pci->reg[PCI_SABRE_ICLR_BASE + (inr & INO_MASK)] = 0; |
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101 | pci->reg[PCI_SABRE_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK; |
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102 | } |
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103 | |||
104 | void pci_sabre_clear_interrupt(pci_t *pci, int inr) |
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105 | { |
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106 | pci->reg[PCI_SABRE_ICLR_BASE + (inr & INO_MASK)] = 0; |
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107 | } |
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108 | |||
109 | /** Initialize PCI controller. */ |
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110 | pci_t *pci_init(ofw_tree_node_t *node) |
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111 | { |
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112 | ofw_tree_property_t *prop; |
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113 | |||
114 | /* |
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115 | * First, verify this is a PCI node. |
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116 | */ |
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117 | ASSERT(strcmp(ofw_tree_node_name(node), "pci") == 0); |
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118 | |||
119 | /* |
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120 | * Determine PCI controller model. |
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121 | */ |
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122 | prop = ofw_tree_getprop(node, "model"); |
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123 | if (!prop || !prop->value) |
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124 | return NULL; |
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125 | |||
126 | if (strcmp(prop->value, "SUNW,sabre") == 0) { |
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127 | /* |
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128 | * PCI controller Sabre. |
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129 | * This model is found on UltraSPARC IIi based machines. |
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130 | */ |
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131 | return pci_sabre_init(node); |
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132 | } else { |
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133 | /* |
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134 | * Unsupported model. |
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135 | */ |
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136 | printf("Unsupported PCI controller model (%s).\n", prop->value); |
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137 | } |
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138 | |||
139 | return NULL; |
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140 | } |
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141 | |||
142 | void pci_enable_interrupt(pci_t *pci, int inr) |
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143 | { |
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144 | ASSERT(pci->model); |
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145 | ASSERT(pci->op && pci->op->enable_interrupt); |
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146 | pci->op->enable_interrupt(pci, inr); |
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147 | } |
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148 | |||
149 | void pci_clear_interrupt(pci_t *pci, int inr) |
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150 | { |
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151 | ASSERT(pci->model); |
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152 | ASSERT(pci->op && pci->op->clear_interrupt); |
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153 | pci->op->clear_interrupt(pci, inr); |
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154 | } |
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155 | |||
156 | /** @} |
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157 | */ |