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| Rev | Author | Line No. | Line |
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| 1911 | jermar | 1 | /* |
| 2 | * Copyright (C) 2006 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | /** @addtogroup sparc64 |
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| 30 | * @{ |
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| 31 | */ |
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| 32 | /** |
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| 33 | * @file |
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| 34 | * @brief PCI driver. |
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| 35 | */ |
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| 36 | |||
| 37 | #include <arch/drivers/pci.h> |
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| 38 | #include <genarch/ofw/ofw_tree.h> |
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| 39 | #include <arch/trap/interrupt.h> |
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| 40 | #include <arch/mm/page.h> |
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| 41 | #include <mm/slab.h> |
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| 42 | #include <arch/types.h> |
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| 43 | #include <typedefs.h> |
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| 44 | #include <debug.h> |
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| 45 | #include <print.h> |
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| 46 | #include <func.h> |
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| 47 | #include <arch/asm.h> |
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| 48 | |||
| 49 | #define PCI_SABRE_REGS_REG 0 |
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| 50 | |||
| 51 | #define PCI_SABRE_IMAP_BASE 0x200 |
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| 52 | #define PCI_SABRE_ICLR_BASE 0x300 |
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| 53 | |||
| 1984 | jermar | 54 | #define PCI_PSYCHO_REGS_REG 2 |
| 55 | |||
| 56 | #define PCI_PSYCHO_IMAP_BASE 0x200 |
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| 57 | #define PCI_PSYCHO_ICLR_BASE 0x300 |
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| 58 | |||
| 1911 | jermar | 59 | static pci_t *pci_sabre_init(ofw_tree_node_t *node); |
| 60 | static void pci_sabre_enable_interrupt(pci_t *pci, int inr); |
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| 61 | static void pci_sabre_clear_interrupt(pci_t *pci, int inr); |
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| 62 | |||
| 1984 | jermar | 63 | static pci_t *pci_psycho_init(ofw_tree_node_t *node); |
| 64 | static void pci_psycho_enable_interrupt(pci_t *pci, int inr); |
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| 65 | static void pci_psycho_clear_interrupt(pci_t *pci, int inr); |
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| 66 | |||
| 1911 | jermar | 67 | /** PCI operations for Sabre model. */ |
| 68 | static pci_operations_t pci_sabre_ops = { |
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| 69 | .enable_interrupt = pci_sabre_enable_interrupt, |
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| 70 | .clear_interrupt = pci_sabre_clear_interrupt |
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| 71 | }; |
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| 1984 | jermar | 72 | /** PCI operations for Psycho model. */ |
| 73 | static pci_operations_t pci_psycho_ops = { |
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| 74 | .enable_interrupt = pci_psycho_enable_interrupt, |
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| 75 | .clear_interrupt = pci_psycho_clear_interrupt |
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| 76 | }; |
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| 1911 | jermar | 77 | |
| 1984 | jermar | 78 | /** Initialize PCI controller (model Sabre). |
| 79 | * |
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| 80 | * @param node OpenFirmware device tree node of the Sabre. |
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| 81 | * |
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| 82 | * @return Address of the initialized PCI structure. |
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| 83 | */ |
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| 1911 | jermar | 84 | pci_t *pci_sabre_init(ofw_tree_node_t *node) |
| 85 | { |
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| 86 | pci_t *pci; |
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| 87 | ofw_tree_property_t *prop; |
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| 88 | |||
| 89 | /* |
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| 90 | * Get registers. |
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| 91 | */ |
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| 92 | prop = ofw_tree_getprop(node, "reg"); |
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| 93 | if (!prop || !prop->value) |
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| 94 | return NULL; |
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| 95 | |||
| 96 | ofw_upa_reg_t *reg = prop->value; |
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| 97 | count_t regs = prop->size / sizeof(ofw_upa_reg_t); |
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| 98 | |||
| 99 | if (regs < PCI_SABRE_REGS_REG + 1) |
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| 100 | return NULL; |
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| 101 | |||
| 102 | uintptr_t paddr; |
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| 103 | if (!ofw_upa_apply_ranges(node->parent, ®[PCI_SABRE_REGS_REG], &paddr)) |
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| 104 | return NULL; |
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| 105 | |||
| 106 | pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC); |
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| 107 | if (!pci) |
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| 108 | return NULL; |
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| 109 | |||
| 110 | pci->model = PCI_SABRE; |
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| 111 | pci->op = &pci_sabre_ops; |
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| 112 | pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_SABRE_REGS_REG].size); |
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| 113 | |||
| 114 | return pci; |
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| 115 | } |
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| 116 | |||
| 1984 | jermar | 117 | |
| 118 | /** Initialize the Psycho PCI controller. |
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| 119 | * |
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| 120 | * @param node OpenFirmware device tree node of the Psycho. |
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| 121 | * |
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| 122 | * @return Address of the initialized PCI structure. |
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| 123 | */ |
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| 124 | pci_t *pci_psycho_init(ofw_tree_node_t *node) |
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| 125 | { |
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| 126 | pci_t *pci; |
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| 127 | ofw_tree_property_t *prop; |
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| 128 | |||
| 129 | /* |
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| 130 | * Get registers. |
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| 131 | */ |
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| 132 | prop = ofw_tree_getprop(node, "reg"); |
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| 133 | if (!prop || !prop->value) |
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| 134 | return NULL; |
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| 135 | |||
| 136 | ofw_upa_reg_t *reg = prop->value; |
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| 137 | count_t regs = prop->size / sizeof(ofw_upa_reg_t); |
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| 138 | |||
| 139 | if (regs < PCI_PSYCHO_REGS_REG + 1) |
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| 140 | return NULL; |
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| 141 | |||
| 142 | uintptr_t paddr; |
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| 143 | if (!ofw_upa_apply_ranges(node->parent, ®[PCI_PSYCHO_REGS_REG], &paddr)) |
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| 144 | return NULL; |
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| 145 | |||
| 146 | pci = (pci_t *) malloc(sizeof(pci_t), FRAME_ATOMIC); |
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| 147 | if (!pci) |
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| 148 | return NULL; |
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| 149 | |||
| 150 | pci->model = PCI_PSYCHO; |
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| 151 | pci->op = &pci_psycho_ops; |
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| 152 | pci->reg = (uint64_t *) hw_map(paddr, reg[PCI_PSYCHO_REGS_REG].size); |
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| 153 | |||
| 154 | return pci; |
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| 155 | } |
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| 156 | |||
| 1911 | jermar | 157 | void pci_sabre_enable_interrupt(pci_t *pci, int inr) |
| 158 | { |
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| 159 | pci->reg[PCI_SABRE_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK; |
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| 160 | } |
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| 161 | |||
| 162 | void pci_sabre_clear_interrupt(pci_t *pci, int inr) |
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| 163 | { |
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| 164 | pci->reg[PCI_SABRE_ICLR_BASE + (inr & INO_MASK)] = 0; |
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| 165 | } |
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| 166 | |||
| 1984 | jermar | 167 | void pci_psycho_enable_interrupt(pci_t *pci, int inr) |
| 168 | { |
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| 169 | pci->reg[PCI_PSYCHO_IMAP_BASE + (inr & INO_MASK)] |= IMAP_V_MASK; |
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| 170 | } |
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| 171 | |||
| 172 | void pci_psycho_clear_interrupt(pci_t *pci, int inr) |
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| 173 | { |
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| 174 | pci->reg[PCI_PSYCHO_ICLR_BASE + (inr & INO_MASK)] = 0; |
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| 175 | } |
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| 176 | |||
| 1911 | jermar | 177 | /** Initialize PCI controller. */ |
| 178 | pci_t *pci_init(ofw_tree_node_t *node) |
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| 179 | { |
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| 180 | ofw_tree_property_t *prop; |
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| 181 | |||
| 182 | /* |
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| 183 | * First, verify this is a PCI node. |
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| 184 | */ |
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| 185 | ASSERT(strcmp(ofw_tree_node_name(node), "pci") == 0); |
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| 186 | |||
| 187 | /* |
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| 188 | * Determine PCI controller model. |
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| 189 | */ |
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| 190 | prop = ofw_tree_getprop(node, "model"); |
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| 191 | if (!prop || !prop->value) |
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| 192 | return NULL; |
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| 193 | |||
| 194 | if (strcmp(prop->value, "SUNW,sabre") == 0) { |
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| 195 | /* |
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| 196 | * PCI controller Sabre. |
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| 197 | * This model is found on UltraSPARC IIi based machines. |
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| 198 | */ |
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| 199 | return pci_sabre_init(node); |
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| 1984 | jermar | 200 | } else if (strcmp(prop->value, "SUNW,psycho") == 0) { |
| 201 | /* |
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| 202 | * PCI controller Psycho. |
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| 203 | * Used on UltraSPARC II based processors, for instance, |
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| 204 | * on Ultra 60. |
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| 205 | */ |
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| 206 | return pci_psycho_init(node); |
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| 1911 | jermar | 207 | } else { |
| 208 | /* |
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| 209 | * Unsupported model. |
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| 210 | */ |
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| 211 | printf("Unsupported PCI controller model (%s).\n", prop->value); |
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| 212 | } |
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| 213 | |||
| 214 | return NULL; |
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| 215 | } |
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| 216 | |||
| 217 | void pci_enable_interrupt(pci_t *pci, int inr) |
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| 218 | { |
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| 219 | ASSERT(pci->model); |
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| 220 | ASSERT(pci->op && pci->op->enable_interrupt); |
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| 221 | pci->op->enable_interrupt(pci, inr); |
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| 222 | } |
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| 223 | |||
| 224 | void pci_clear_interrupt(pci_t *pci, int inr) |
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| 225 | { |
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| 226 | ASSERT(pci->model); |
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| 227 | ASSERT(pci->op && pci->op->clear_interrupt); |
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| 228 | pci->op->clear_interrupt(pci, inr); |
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| 229 | } |
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| 230 | |||
| 231 | /** @} |
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| 232 | */ |