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| Rev | Author | Line No. | Line |
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| 640 | jermar | 1 | /* |
| 2 | * Copyright (C) 2005 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1784 | jermar | 29 | /** @addtogroup sparc64 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 1784 | jermar | 35 | #ifndef KERN_sparc64_REGISTER_H_ |
| 36 | #define KERN_sparc64_REGISTER_H_ |
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| 640 | jermar | 37 | |
| 1784 | jermar | 38 | #ifdef __ASM__ |
| 39 | #define PSTATE_IE_BIT 2 |
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| 40 | #define PSTATE_AM_BIT 8 |
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| 41 | #else |
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| 42 | |||
| 640 | jermar | 43 | #include <arch/types.h> |
| 44 | |||
| 45 | /** Version Register. */ |
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| 46 | union ver_reg { |
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| 1780 | jermar | 47 | uint64_t value; |
| 640 | jermar | 48 | struct { |
| 1780 | jermar | 49 | uint16_t manuf; /**< Manufacturer code. */ |
| 50 | uint16_t impl; /**< Implementation code. */ |
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| 51 | uint8_t mask; /**< Mask set revision. */ |
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| 640 | jermar | 52 | unsigned : 8; |
| 1780 | jermar | 53 | uint8_t maxtl; |
| 640 | jermar | 54 | unsigned : 3; |
| 55 | unsigned maxwin : 5; |
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| 56 | } __attribute__ ((packed)); |
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| 57 | }; |
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| 58 | typedef union ver_reg ver_reg_t; |
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| 59 | |||
| 650 | jermar | 60 | /** Processor State Register. */ |
| 61 | union pstate_reg { |
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| 1780 | jermar | 62 | uint64_t value; |
| 650 | jermar | 63 | struct { |
| 1780 | jermar | 64 | uint64_t : 52; |
| 650 | jermar | 65 | unsigned ig : 1; /**< Interrupt Globals. */ |
| 66 | unsigned mg : 1; /**< MMU Globals. */ |
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| 67 | unsigned cle : 1; /**< Current Little Endian. */ |
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| 68 | unsigned tle : 1; /**< Trap Little Endian. */ |
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| 69 | unsigned mm : 2; /**< Memory Model. */ |
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| 70 | unsigned red : 1; /**< RED state. */ |
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| 71 | unsigned pef : 1; /**< Enable floating-point. */ |
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| 72 | unsigned am : 1; /**< 32-bit Address Mask. */ |
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| 73 | unsigned priv : 1; /**< Privileged Mode. */ |
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| 74 | unsigned ie : 1; /**< Interrupt Enable. */ |
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| 75 | unsigned ag : 1; /**< Alternate Globals*/ |
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| 76 | } __attribute__ ((packed)); |
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| 77 | }; |
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| 78 | typedef union pstate_reg pstate_reg_t; |
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| 79 | |||
| 658 | jermar | 80 | /** TICK Register. */ |
| 81 | union tick_reg { |
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| 1780 | jermar | 82 | uint64_t value; |
| 658 | jermar | 83 | struct { |
| 84 | unsigned npt : 1; /**< Non-privileged Trap enable. */ |
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| 1780 | jermar | 85 | uint64_t counter : 63; /**< Elapsed CPU clck cycle counter. */ |
| 658 | jermar | 86 | } __attribute__ ((packed)); |
| 87 | }; |
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| 88 | typedef union tick_reg tick_reg_t; |
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| 89 | |||
| 90 | /** TICK_compare Register. */ |
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| 91 | union tick_compare_reg { |
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| 1780 | jermar | 92 | uint64_t value; |
| 658 | jermar | 93 | struct { |
| 664 | jermar | 94 | unsigned int_dis : 1; /**< TICK_INT interrupt disabled flag. */ |
| 1780 | jermar | 95 | uint64_t tick_cmpr : 63; /**< Compare value for TICK interrupts. */ |
| 658 | jermar | 96 | } __attribute__ ((packed)); |
| 97 | }; |
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| 98 | typedef union tick_compare_reg tick_compare_reg_t; |
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| 99 | |||
| 664 | jermar | 100 | /** SOFTINT Register. */ |
| 101 | union softint_reg { |
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| 1780 | jermar | 102 | uint64_t value; |
| 664 | jermar | 103 | struct { |
| 1780 | jermar | 104 | uint64_t : 47; |
| 664 | jermar | 105 | unsigned stick_int : 1; |
| 106 | unsigned int_level : 15; |
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| 107 | unsigned tick_int : 1; |
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| 108 | } __attribute__ ((packed)); |
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| 109 | }; |
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| 110 | typedef union softint_reg softint_reg_t; |
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| 111 | |||
| 640 | jermar | 112 | #endif |
| 1702 | cejka | 113 | |
| 1784 | jermar | 114 | #endif |
| 115 | |||
| 116 | /** @} |
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| 1702 | cejka | 117 | */ |