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1844 | jermar | 1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | /** @addtogroup sparc64 |
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30 | * @{ |
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31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
35 | #ifndef KERN_sparc64_NS16550_H_ |
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36 | #define KERN_sparc64_NS16550_H_ |
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37 | |||
38 | #include <arch/types.h> |
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39 | #include <arch/drivers/kbd.h> |
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40 | |||
1911 | jermar | 41 | /* NS16550 registers */ |
1844 | jermar | 42 | #define RBR_REG 0 /** Receiver Buffer Register. */ |
1849 | jermar | 43 | #define IER_REG 1 /** Interrupt Enable Register. */ |
1911 | jermar | 44 | #define IIR_REG 2 /** Interrupt Ident Register (read). */ |
45 | #define FCR_REG 2 /** FIFO control register (write). */ |
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46 | #define LCR_REG 3 /** Line Control register. */ |
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1844 | jermar | 47 | #define LSR_REG 5 /** Line Status Register. */ |
48 | |||
1911 | jermar | 49 | #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ |
50 | |||
51 | #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ |
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52 | |||
1844 | jermar | 53 | static inline uint8_t ns16550_rbr_read(void) |
54 | { |
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55 | return kbd_virt_address[RBR_REG]; |
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56 | } |
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57 | |||
1849 | jermar | 58 | static inline uint8_t ns16550_ier_read(void) |
59 | { |
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60 | return kbd_virt_address[IER_REG]; |
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61 | } |
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62 | |||
63 | static inline void ns16550_ier_write(uint8_t v) |
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64 | { |
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65 | kbd_virt_address[IER_REG] = v; |
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66 | } |
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67 | |||
1911 | jermar | 68 | static inline uint8_t ns16550_iir_read(void) |
69 | { |
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70 | return kbd_virt_address[IIR_REG]; |
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71 | } |
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72 | |||
73 | static inline void ns16550_fcr_write(uint8_t v) |
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74 | { |
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75 | kbd_virt_address[FCR_REG] = v; |
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76 | } |
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77 | |||
78 | static inline uint8_t ns16550_lcr_read(void) |
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79 | { |
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80 | return kbd_virt_address[LCR_REG]; |
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81 | } |
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82 | |||
83 | static inline void ns16550_lcr_write(uint8_t v) |
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84 | { |
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85 | kbd_virt_address[LCR_REG] = v; |
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86 | } |
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87 | |||
1844 | jermar | 88 | static inline uint8_t ns16550_lsr_read(void) |
89 | { |
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90 | return kbd_virt_address[LSR_REG]; |
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91 | } |
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92 | |||
93 | #endif |
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94 | |||
95 | /** @} |
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96 | */ |