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418 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2005 Jakub Jermar |
418 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1731 | jermar | 29 | /** @addtogroup sparc64 |
1702 | cejka | 30 | * @{ |
31 | */ |
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32 | /** @file |
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33 | */ |
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34 | |||
1860 | jermar | 35 | #ifndef KERN_sparc64_CPU_H_ |
36 | #define KERN_sparc64_CPU_H_ |
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418 | jermar | 37 | |
1903 | jermar | 38 | #include <arch/types.h> |
640 | jermar | 39 | #include <arch/register.h> |
418 | jermar | 40 | |
640 | jermar | 41 | #define MANUF_FUJITSU 0x04 |
42 | #define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ |
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43 | #define MANUF_SUN 0x3e |
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44 | |||
45 | #define IMPL_ULTRASPARCI 0x10 |
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46 | #define IMPL_ULTRASPARCII 0x11 |
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47 | #define IMPL_ULTRASPARCII_I 0x12 |
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48 | #define IMPL_ULTRASPARCII_E 0x13 |
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49 | #define IMPL_ULTRASPARCIII 0x15 |
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50 | #define IMPL_ULTRASPARCIV_PLUS 0x19 |
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51 | |||
52 | #define IMPL_SPARC64V 0x5 |
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53 | |||
418 | jermar | 54 | struct cpu_arch { |
1903 | jermar | 55 | uint32_t mid; /**< Processor ID as read from UPA_CONFIG. */ |
640 | jermar | 56 | ver_reg_t ver; |
2046 | jermar | 57 | uint32_t clock_frequency; /**< Processor frequency in Hz. */ |
2044 | jermar | 58 | uint64_t next_tick_cmpr; /**< Next clock interrupt should be |
2045 | jermar | 59 | * generated when the TICK register |
60 | * matches this value. |
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2044 | jermar | 61 | */ |
418 | jermar | 62 | }; |
63 | |||
64 | #endif |
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1702 | cejka | 65 | |
1731 | jermar | 66 | /** @} |
1702 | cejka | 67 | */ |