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418 | jermar | 1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #ifndef __sparc64_ASM_H__ |
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30 | #define __sparc64_ASM_H__ |
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31 | |||
32 | #include <arch/types.h> |
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33 | #include <config.h> |
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34 | |||
35 | /** Enable interrupts. |
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36 | * |
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37 | * Enable interrupts and return previous |
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38 | * value of IPL. |
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39 | * |
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40 | * @return Old interrupt priority level. |
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41 | */ |
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42 | static inline ipl_t interrupts_enable(void) { |
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43 | } |
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44 | |||
45 | /** Disable interrupts. |
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46 | * |
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47 | * Disable interrupts and return previous |
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48 | * value of IPL. |
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49 | * |
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50 | * @return Old interrupt priority level. |
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51 | */ |
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52 | static inline ipl_t interrupts_disable(void) { |
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53 | } |
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54 | |||
55 | /** Restore interrupt priority level. |
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56 | * |
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57 | * Restore IPL. |
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58 | * |
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59 | * @param ipl Saved interrupt priority level. |
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60 | */ |
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61 | static inline void interrupts_restore(ipl_t ipl) { |
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62 | } |
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63 | |||
64 | /** Return interrupt priority level. |
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65 | * |
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66 | * Return IPL. |
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67 | * |
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68 | * @return Current interrupt priority level. |
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69 | */ |
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70 | static inline ipl_t interrupts_read(void) { |
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71 | } |
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72 | |||
73 | /** Return base address of current stack. |
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74 | * |
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75 | * Return the base address of the current stack. |
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76 | * The stack is assumed to be STACK_SIZE bytes long. |
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77 | * The stack must start on page boundary. |
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78 | */ |
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79 | static inline __address get_stack_base(void) |
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80 | { |
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426 | jermar | 81 | __address v; |
82 | |||
83 | __asm__ volatile ("and %%o6, %1, %0\n" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
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84 | |||
85 | return v; |
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418 | jermar | 86 | } |
87 | |||
529 | jermar | 88 | /** Read Trap Base Address register. |
89 | * |
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90 | * @return Current value in TBA. |
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91 | */ |
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92 | static inline __u64 tba_read(void) |
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93 | { |
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94 | __u64 v; |
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95 | |||
96 | __asm__ volatile ("rdpr %%tba, %0\n" : "=r" (v)); |
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97 | |||
98 | return v; |
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99 | } |
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100 | |||
101 | /** Write Trap Base Address register. |
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102 | * |
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103 | * @param New value of TBA. |
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104 | */ |
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105 | static inline void tba_write(__u64 v) |
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106 | { |
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107 | __asm__ volatile ("wrpr %0, %1, %%tba\n" : : "r" (v), "i" (0)); |
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108 | } |
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109 | |||
110 | |||
418 | jermar | 111 | void cpu_halt(void); |
112 | void cpu_sleep(void); |
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113 | void asm_delay_loop(__u32 t); |
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114 | |||
115 | #endif |