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162 decky 1
#
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# Copyright (C) 2005 Martin Decky
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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845 decky 29
#include <arch/asm/regname.h>
191 decky 30
 
162 decky 31
.text
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1220 decky 33
.global userspace_asm
1004 decky 34
.global iret
1277 decky 35
.global iret_syscall
210 decky 36
.global memsetb
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.global memcpy
1288 jermar 38
.global memcpy_from_uspace
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.global memcpy_to_uspace
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.global memcpy_from_uspace_failover_address
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.global memcpy_to_uspace_failover_address
185 decky 42
 
1220 decky 43
userspace_asm:
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	# r3 = uspace_uarg
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	# r4 = stack
1267 decky 47
	# r5 = entry
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	# disable interrupts
1220 decky 50
 
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	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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	# set entry point
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57
	mtsrr0 r5
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59
	# set problem state, enable interrupts
60
 
1267 decky 61
	ori r31, r31, msr_pr
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	ori r31, r31, msr_ee
1220 decky 63
	mtsrr1 r31
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	# set stack
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67
	mr sp, r4
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	# jump to userspace
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71
	rfi
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1004 decky 73
iret:
1277 decky 74
 
75
	# disable interrupts
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77
	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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1355 decky 81
	lwz r0, 8(sp)
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	lwz r2, 12(sp)
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	lwz r3, 16(sp)
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	lwz r4, 20(sp)
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	lwz r5, 24(sp)
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	lwz r6, 28(sp)
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	lwz r7, 32(sp)
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	lwz r8, 36(sp)
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	lwz r9, 40(sp)
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	lwz r10, 44(sp)
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	lwz r11, 48(sp)
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	lwz r13, 52(sp)
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	lwz r14, 56(sp)
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	lwz r15, 60(sp)
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	lwz r16, 64(sp)
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	lwz r17, 68(sp)
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	lwz r18, 72(sp)
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	lwz r19, 76(sp)
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	lwz r20, 80(sp)
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	lwz r21, 84(sp)
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	lwz r22, 88(sp)
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	lwz r23, 92(sp)
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	lwz r24, 96(sp)
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	lwz r25, 100(sp)
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	lwz r26, 104(sp)
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	lwz r27, 108(sp)
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	lwz r28, 112(sp)
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	lwz r29, 116(sp)
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	lwz r30, 120(sp)
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	lwz r31, 124(sp)
1004 decky 111
 
1355 decky 112
	lwz r12, 128(sp)
1277 decky 113
	mtcr r12
114
 
1355 decky 115
	lwz r12, 132(sp)
1267 decky 116
	mtsrr0 r12
1004 decky 117
 
1355 decky 118
	lwz r12, 136(sp)
1267 decky 119
	mtsrr1 r12
120
 
1355 decky 121
	lwz r12, 140(sp)
1267 decky 122
	mtlr r12
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1355 decky 124
	lwz r12, 144(sp)
1277 decky 125
	mtctr r12
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1355 decky 127
	lwz r12, 148(sp)
1277 decky 128
	mtxer r12
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1355 decky 130
	lwz r12, 152(sp)
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	lwz sp, 156(sp)
1277 decky 132
 
133
	rfi
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135
iret_syscall:
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1384 decky 137
	# reset decrementer
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139
	li r31, 1000
140
	mtdec r31
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1277 decky 142
	# disable interrupts
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144
	mfmsr r31
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	rlwinm r31, r31, 0, 17, 15
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	mtmsr r31
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1355 decky 148
	lwz r0, 8(sp)
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	lwz r2, 12(sp)
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	lwz r4, 20(sp)
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	lwz r5, 24(sp)
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	lwz r6, 28(sp)
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	lwz r7, 32(sp)
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	lwz r8, 36(sp)
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	lwz r9, 40(sp)
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	lwz r10, 44(sp)
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	lwz r11, 48(sp)
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	lwz r13, 52(sp)
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	lwz r14, 56(sp)
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	lwz r15, 60(sp)
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	lwz r16, 64(sp)
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	lwz r17, 68(sp)
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	lwz r18, 72(sp)
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	lwz r19, 76(sp)
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	lwz r20, 80(sp)
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	lwz r21, 84(sp)
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	lwz r22, 88(sp)
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	lwz r23, 92(sp)
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	lwz r24, 96(sp)
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	lwz r25, 100(sp)
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	lwz r26, 104(sp)
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	lwz r27, 108(sp)
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	lwz r28, 112(sp)
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	lwz r29, 116(sp)
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	lwz r30, 120(sp)
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	lwz r31, 124(sp)
1277 decky 177
 
1355 decky 178
	lwz r12, 128(sp)
1267 decky 179
	mtcr r12
180
 
1355 decky 181
	lwz r12, 132(sp)
1277 decky 182
	mtsrr0 r12
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1355 decky 184
	lwz r12, 136(sp)
1277 decky 185
	mtsrr1 r12
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1355 decky 187
	lwz r12, 140(sp)
1277 decky 188
	mtlr r12
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1355 decky 190
	lwz r12, 144(sp)
1267 decky 191
	mtctr r12
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1355 decky 193
	lwz r12, 148(sp)
1267 decky 194
	mtxer r12
1277 decky 195
 
1355 decky 196
	lwz r12, 152(sp)
197
	lwz sp, 156(sp)
1267 decky 198
 
1004 decky 199
	rfi
200
 
210 decky 201
memsetb:
202
	rlwimi r5, r5, 8, 16, 23
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	rlwimi r5, r5, 16, 0, 15
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205
	addi r14, r3, -4
206
 
207
	cmplwi 0, r4, 4
208
	blt 7f
209
 
210
	stwu r5, 4(r14)
211
	beqlr
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213
	andi. r15, r14, 3
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	add r4, r15, r4
215
	subf r14, r15, r14
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	srwi r15, r4, 2
217
	mtctr r15
218
 
219
	bdz 6f
220
 
221
	1:
222
		stwu r5, 4(r14)
223
		bdnz 1b
224
 
225
	6:
226
 
227
	andi. r4, r4, 3
228
 
229
	7:
230
 
231
	cmpwi 0, r4, 0
232
	beqlr
233
 
234
	mtctr r4
235
	addi r6, r6, 3
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237
	8:
238
 
239
	stbu r5, 1(r14)
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	bdnz 8b
241
 
242
	blr
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244
memcpy:
1288 jermar 245
memcpy_from_uspace:
246
memcpy_to_uspace:
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860 decky 248
	srwi. r7, r5, 3
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	addi r6, r3, -4
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	addi r4, r4, -4
251
	beq	2f
252
 
253
	andi. r0, r6, 3
254
	mtctr r7
255
	bne 5f
256
 
257
	1:
258
 
259
	lwz r7, 4(r4)
260
	lwzu r8, 8(r4)
261
	stw r7, 4(r6)
262
	stwu r8, 8(r6)
263
	bdnz 1b
264
 
265
	andi. r5, r5, 7
266
 
267
	2:
268
 
269
	cmplwi 0, r5, 4
270
	blt 3f
271
 
272
	lwzu r0, 4(r4)
273
	addi r5, r5, -4
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	stwu r0, 4(r6)
275
 
276
	3:
277
 
278
	cmpwi 0, r5, 0
279
	beqlr
280
	mtctr r5
281
	addi r4, r4, 3
282
	addi r6, r6, 3
283
 
284
	4:
285
 
286
	lbzu r0, 1(r4)
287
	stbu r0, 1(r6)
288
	bdnz 4b
210 decky 289
	blr
860 decky 290
 
291
	5:
292
 
293
	subfic r0, r0, 4
294
	mtctr r0
295
 
296
	6:
297
 
298
	lbz r7, 4(r4)
299
	addi r4, r4, 1
300
	stb r7, 4(r6)
301
	addi r6, r6, 1
302
	bdnz 6b
303
	subf r5, r0, r5
304
	rlwinm. r7, r5, 32-3, 3, 31
305
	beq 2b
306
	mtctr r7
307
	b 1b
1288 jermar 308
 
309
memcpy_from_uspace_failover_address:
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memcpy_to_uspace_failover_address:
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	b memcpy_from_uspace_failover_address