Rev 403 | Rev 492 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
1 | jermar | 1 | /* |
319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
||
5 | * Redistribution and use in source and binary forms, with or without |
||
6 | * modification, are permitted provided that the following conditions |
||
7 | * are met: |
||
8 | * |
||
9 | * - Redistributions of source code must retain the above copyright |
||
10 | * notice, this list of conditions and the following disclaimer. |
||
11 | * - Redistributions in binary form must reproduce the above copyright |
||
12 | * notice, this list of conditions and the following disclaimer in the |
||
13 | * documentation and/or other materials provided with the distribution. |
||
14 | * - The name of the author may not be used to endorse or promote products |
||
15 | * derived from this software without specific prior written permission. |
||
16 | * |
||
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
||
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
||
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
||
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
||
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
||
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
||
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
||
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
||
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
||
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||
27 | */ |
||
28 | |||
29 | #include <arch/mm/tlb.h> |
||
130 | decky | 30 | #include <arch/mm/asid.h> |
1 | jermar | 31 | #include <mm/tlb.h> |
391 | jermar | 32 | #include <mm/page.h> |
33 | #include <mm/vm.h> |
||
1 | jermar | 34 | #include <arch/cp0.h> |
35 | #include <panic.h> |
||
36 | #include <arch.h> |
||
268 | palkovsky | 37 | #include <symtab.h> |
391 | jermar | 38 | #include <synch/spinlock.h> |
39 | #include <print.h> |
||
396 | jermar | 40 | #include <debug.h> |
268 | palkovsky | 41 | |
391 | jermar | 42 | static void tlb_refill_fail(struct exception_regdump *pstate); |
43 | static void tlb_invalid_fail(struct exception_regdump *pstate); |
||
44 | static void tlb_modified_fail(struct exception_regdump *pstate); |
||
45 | |||
394 | jermar | 46 | static pte_t *find_mapping_and_check(__address badvaddr); |
399 | jermar | 47 | |
396 | jermar | 48 | static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn); |
399 | jermar | 49 | static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr); |
394 | jermar | 50 | |
391 | jermar | 51 | /** Initialize TLB |
52 | * |
||
53 | * Initialize TLB. |
||
54 | * Invalidate all entries and mark wired entries. |
||
55 | */ |
||
389 | jermar | 56 | void tlb_init_arch(void) |
57 | { |
||
58 | int i; |
||
59 | |||
60 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
||
61 | cp0_entry_hi_write(0); |
||
62 | cp0_entry_lo0_write(0); |
||
63 | cp0_entry_lo1_write(0); |
||
64 | |||
65 | /* |
||
66 | * Invalidate all entries. |
||
67 | */ |
||
68 | for (i = 0; i < TLB_SIZE; i++) { |
||
391 | jermar | 69 | cp0_index_write(i); |
389 | jermar | 70 | tlbwi(); |
71 | } |
||
72 | |||
73 | /* |
||
74 | * The kernel is going to make use of some wired |
||
391 | jermar | 75 | * entries (e.g. mapping kernel stacks in kseg3). |
389 | jermar | 76 | */ |
77 | cp0_wired_write(TLB_WIRED); |
||
78 | } |
||
79 | |||
391 | jermar | 80 | /** Process TLB Refill Exception |
81 | * |
||
82 | * Process TLB Refill Exception. |
||
83 | * |
||
84 | * @param pstate Interrupted register context. |
||
85 | */ |
||
317 | palkovsky | 86 | void tlb_refill(struct exception_regdump *pstate) |
1 | jermar | 87 | { |
396 | jermar | 88 | entry_lo_t lo; |
399 | jermar | 89 | entry_hi_t hi; |
391 | jermar | 90 | __address badvaddr; |
91 | pte_t *pte; |
||
397 | jermar | 92 | |
391 | jermar | 93 | badvaddr = cp0_badvaddr_read(); |
397 | jermar | 94 | |
394 | jermar | 95 | spinlock_lock(&VM->lock); |
399 | jermar | 96 | |
394 | jermar | 97 | pte = find_mapping_and_check(badvaddr); |
98 | if (!pte) |
||
391 | jermar | 99 | goto fail; |
100 | |||
101 | /* |
||
394 | jermar | 102 | * Record access to PTE. |
391 | jermar | 103 | */ |
394 | jermar | 104 | pte->a = 1; |
391 | jermar | 105 | |
399 | jermar | 106 | prepare_entry_hi(&hi, VM->asid, badvaddr); |
403 | jermar | 107 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn); |
394 | jermar | 108 | |
391 | jermar | 109 | /* |
110 | * New entry is to be inserted into TLB |
||
111 | */ |
||
399 | jermar | 112 | cp0_entry_hi_write(hi.value); |
391 | jermar | 113 | if ((badvaddr/PAGE_SIZE) % 2 == 0) { |
396 | jermar | 114 | cp0_entry_lo0_write(lo.value); |
391 | jermar | 115 | cp0_entry_lo1_write(0); |
116 | } |
||
117 | else { |
||
118 | cp0_entry_lo0_write(0); |
||
396 | jermar | 119 | cp0_entry_lo1_write(lo.value); |
391 | jermar | 120 | } |
121 | tlbwr(); |
||
122 | |||
123 | spinlock_unlock(&VM->lock); |
||
124 | return; |
||
125 | |||
126 | fail: |
||
127 | spinlock_unlock(&VM->lock); |
||
128 | tlb_refill_fail(pstate); |
||
129 | } |
||
130 | |||
394 | jermar | 131 | /** Process TLB Invalid Exception |
132 | * |
||
133 | * Process TLB Invalid Exception. |
||
134 | * |
||
135 | * @param pstate Interrupted register context. |
||
136 | */ |
||
391 | jermar | 137 | void tlb_invalid(struct exception_regdump *pstate) |
138 | { |
||
396 | jermar | 139 | tlb_index_t index; |
394 | jermar | 140 | __address badvaddr; |
396 | jermar | 141 | entry_lo_t lo; |
399 | jermar | 142 | entry_hi_t hi; |
394 | jermar | 143 | pte_t *pte; |
144 | |||
145 | badvaddr = cp0_badvaddr_read(); |
||
146 | |||
147 | /* |
||
148 | * Locate the faulting entry in TLB. |
||
149 | */ |
||
399 | jermar | 150 | hi.value = cp0_entry_hi_read(); |
151 | prepare_entry_hi(&hi, hi.asid, badvaddr); |
||
152 | cp0_entry_hi_write(hi.value); |
||
394 | jermar | 153 | tlbp(); |
396 | jermar | 154 | index.value = cp0_index_read(); |
394 | jermar | 155 | |
156 | spinlock_lock(&VM->lock); |
||
157 | |||
158 | /* |
||
159 | * Fail if the entry is not in TLB. |
||
160 | */ |
||
396 | jermar | 161 | if (index.p) { |
162 | printf("TLB entry not found.\n"); |
||
394 | jermar | 163 | goto fail; |
396 | jermar | 164 | } |
394 | jermar | 165 | |
166 | pte = find_mapping_and_check(badvaddr); |
||
167 | if (!pte) |
||
168 | goto fail; |
||
169 | |||
170 | /* |
||
171 | * Read the faulting TLB entry. |
||
172 | */ |
||
173 | tlbr(); |
||
174 | |||
175 | /* |
||
176 | * Record access to PTE. |
||
177 | */ |
||
178 | pte->a = 1; |
||
179 | |||
403 | jermar | 180 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->lo.d, pte->lo.c, pte->lo.pfn); |
394 | jermar | 181 | |
182 | /* |
||
183 | * The entry is to be updated in TLB. |
||
184 | */ |
||
185 | if ((badvaddr/PAGE_SIZE) % 2 == 0) |
||
396 | jermar | 186 | cp0_entry_lo0_write(lo.value); |
394 | jermar | 187 | else |
396 | jermar | 188 | cp0_entry_lo1_write(lo.value); |
394 | jermar | 189 | tlbwi(); |
190 | |||
191 | spinlock_unlock(&VM->lock); |
||
192 | return; |
||
193 | |||
194 | fail: |
||
195 | spinlock_unlock(&VM->lock); |
||
391 | jermar | 196 | tlb_invalid_fail(pstate); |
197 | } |
||
198 | |||
394 | jermar | 199 | /** Process TLB Modified Exception |
200 | * |
||
201 | * Process TLB Modified Exception. |
||
202 | * |
||
203 | * @param pstate Interrupted register context. |
||
204 | */ |
||
391 | jermar | 205 | void tlb_modified(struct exception_regdump *pstate) |
206 | { |
||
396 | jermar | 207 | tlb_index_t index; |
394 | jermar | 208 | __address badvaddr; |
396 | jermar | 209 | entry_lo_t lo; |
399 | jermar | 210 | entry_hi_t hi; |
394 | jermar | 211 | pte_t *pte; |
212 | |||
213 | badvaddr = cp0_badvaddr_read(); |
||
214 | |||
215 | /* |
||
216 | * Locate the faulting entry in TLB. |
||
217 | */ |
||
399 | jermar | 218 | hi.value = cp0_entry_hi_read(); |
219 | prepare_entry_hi(&hi, hi.asid, badvaddr); |
||
220 | cp0_entry_hi_write(hi.value); |
||
394 | jermar | 221 | tlbp(); |
396 | jermar | 222 | index.value = cp0_index_read(); |
394 | jermar | 223 | |
224 | spinlock_lock(&VM->lock); |
||
225 | |||
226 | /* |
||
227 | * Fail if the entry is not in TLB. |
||
228 | */ |
||
396 | jermar | 229 | if (index.p) { |
230 | printf("TLB entry not found.\n"); |
||
394 | jermar | 231 | goto fail; |
396 | jermar | 232 | } |
394 | jermar | 233 | |
234 | pte = find_mapping_and_check(badvaddr); |
||
235 | if (!pte) |
||
236 | goto fail; |
||
237 | |||
238 | /* |
||
239 | * Fail if the page is not writable. |
||
240 | */ |
||
241 | if (!pte->w) |
||
242 | goto fail; |
||
243 | |||
244 | /* |
||
245 | * Read the faulting TLB entry. |
||
246 | */ |
||
247 | tlbr(); |
||
248 | |||
249 | /* |
||
250 | * Record access and write to PTE. |
||
251 | */ |
||
252 | pte->a = 1; |
||
403 | jermar | 253 | pte->lo.d = 1; |
394 | jermar | 254 | |
403 | jermar | 255 | prepare_entry_lo(&lo, pte->lo.g, pte->lo.v, pte->w, pte->lo.c, pte->lo.pfn); |
394 | jermar | 256 | |
257 | /* |
||
258 | * The entry is to be updated in TLB. |
||
259 | */ |
||
260 | if ((badvaddr/PAGE_SIZE) % 2 == 0) |
||
396 | jermar | 261 | cp0_entry_lo0_write(lo.value); |
394 | jermar | 262 | else |
396 | jermar | 263 | cp0_entry_lo1_write(lo.value); |
394 | jermar | 264 | tlbwi(); |
265 | |||
266 | spinlock_unlock(&VM->lock); |
||
267 | return; |
||
268 | |||
269 | fail: |
||
270 | spinlock_unlock(&VM->lock); |
||
391 | jermar | 271 | tlb_modified_fail(pstate); |
272 | } |
||
273 | |||
274 | void tlb_refill_fail(struct exception_regdump *pstate) |
||
275 | { |
||
324 | palkovsky | 276 | char *symbol = ""; |
277 | char *sym2 = ""; |
||
278 | |||
332 | palkovsky | 279 | char *s = get_symtab_entry(pstate->epc); |
280 | if (s) |
||
281 | symbol = s; |
||
282 | s = get_symtab_entry(pstate->ra); |
||
283 | if (s) |
||
284 | sym2 = s; |
||
391 | jermar | 285 | panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), pstate->epc, symbol, sym2); |
1 | jermar | 286 | } |
287 | |||
391 | jermar | 288 | |
289 | void tlb_invalid_fail(struct exception_regdump *pstate) |
||
1 | jermar | 290 | { |
268 | palkovsky | 291 | char *symbol = ""; |
292 | |||
332 | palkovsky | 293 | char *s = get_symtab_entry(pstate->epc); |
294 | if (s) |
||
295 | symbol = s; |
||
394 | jermar | 296 | panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
1 | jermar | 297 | } |
298 | |||
391 | jermar | 299 | void tlb_modified_fail(struct exception_regdump *pstate) |
389 | jermar | 300 | { |
301 | char *symbol = ""; |
||
302 | |||
303 | char *s = get_symtab_entry(pstate->epc); |
||
304 | if (s) |
||
305 | symbol = s; |
||
394 | jermar | 306 | panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
389 | jermar | 307 | } |
308 | |||
396 | jermar | 309 | /** Invalidate TLB entries with specified ASID |
310 | * |
||
311 | * Invalidate TLB entries with specified ASID. |
||
312 | * |
||
313 | * @param asid ASID. |
||
314 | */ |
||
315 | void tlb_invalidate(asid_t asid) |
||
1 | jermar | 316 | { |
396 | jermar | 317 | entry_hi_t hi; |
413 | jermar | 318 | ipl_t ipl; |
396 | jermar | 319 | int i; |
130 | decky | 320 | |
396 | jermar | 321 | ASSERT(asid != ASID_INVALID); |
322 | |||
413 | jermar | 323 | ipl = interrupts_disable(); |
130 | decky | 324 | |
396 | jermar | 325 | for (i = 0; i < TLB_SIZE; i++) { |
326 | cp0_index_write(i); |
||
327 | tlbr(); |
||
328 | |||
329 | hi.value = cp0_entry_hi_read(); |
||
330 | if (hi.asid == asid) { |
||
331 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
||
332 | cp0_entry_hi_write(0); |
||
333 | cp0_entry_lo0_write(0); |
||
334 | cp0_entry_lo1_write(0); |
||
335 | tlbwi(); |
||
336 | } |
||
337 | } |
||
130 | decky | 338 | |
413 | jermar | 339 | interrupts_restore(ipl); |
1 | jermar | 340 | } |
394 | jermar | 341 | |
342 | /** Try to find PTE for faulting address |
||
343 | * |
||
344 | * Try to find PTE for faulting address. |
||
345 | * The VM->lock must be held on entry to this function. |
||
346 | * |
||
347 | * @param badvaddr Faulting virtual address. |
||
348 | * |
||
349 | * @return PTE on success, NULL otherwise. |
||
350 | */ |
||
351 | pte_t *find_mapping_and_check(__address badvaddr) |
||
352 | { |
||
396 | jermar | 353 | entry_hi_t hi; |
394 | jermar | 354 | pte_t *pte; |
355 | |||
396 | jermar | 356 | hi.value = cp0_entry_hi_read(); |
394 | jermar | 357 | |
358 | /* |
||
359 | * Handler cannot succeed if the ASIDs don't match. |
||
360 | */ |
||
396 | jermar | 361 | if (hi.asid != VM->asid) { |
362 | printf("EntryHi.asid=%d, VM->asid=%d\n", hi.asid, VM->asid); |
||
394 | jermar | 363 | return NULL; |
396 | jermar | 364 | } |
394 | jermar | 365 | |
366 | /* |
||
367 | * Handler cannot succeed if badvaddr has no mapping. |
||
368 | */ |
||
369 | pte = find_mapping(badvaddr, 0); |
||
396 | jermar | 370 | if (!pte) { |
371 | printf("No such mapping.\n"); |
||
394 | jermar | 372 | return NULL; |
396 | jermar | 373 | } |
394 | jermar | 374 | |
375 | /* |
||
376 | * Handler cannot succeed if the mapping is marked as invalid. |
||
377 | */ |
||
403 | jermar | 378 | if (!pte->lo.v) { |
396 | jermar | 379 | printf("Invalid mapping.\n"); |
394 | jermar | 380 | return NULL; |
396 | jermar | 381 | } |
394 | jermar | 382 | |
383 | return pte; |
||
384 | } |
||
385 | |||
396 | jermar | 386 | void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn) |
394 | jermar | 387 | { |
399 | jermar | 388 | lo->value = 0; |
394 | jermar | 389 | lo->g = g; |
390 | lo->v = v; |
||
391 | lo->d = d; |
||
392 | lo->c = c; |
||
393 | lo->pfn = pfn; |
||
394 | } |
||
399 | jermar | 395 | |
396 | void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr) |
||
397 | { |
||
398 | hi->value = (((addr/PAGE_SIZE)/2)*PAGE_SIZE*2); |
||
399 | hi->asid = asid; |
||
400 | } |