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1 | jermar | 1 | /* |
319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #include <arch/mm/tlb.h> |
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130 | decky | 30 | #include <arch/mm/asid.h> |
1 | jermar | 31 | #include <mm/tlb.h> |
391 | jermar | 32 | #include <mm/page.h> |
33 | #include <mm/vm.h> |
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1 | jermar | 34 | #include <arch/cp0.h> |
35 | #include <panic.h> |
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36 | #include <arch.h> |
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268 | palkovsky | 37 | #include <symtab.h> |
391 | jermar | 38 | #include <synch/spinlock.h> |
39 | #include <print.h> |
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396 | jermar | 40 | #include <debug.h> |
268 | palkovsky | 41 | |
391 | jermar | 42 | static void tlb_refill_fail(struct exception_regdump *pstate); |
43 | static void tlb_invalid_fail(struct exception_regdump *pstate); |
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44 | static void tlb_modified_fail(struct exception_regdump *pstate); |
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45 | |||
394 | jermar | 46 | static pte_t *find_mapping_and_check(__address badvaddr); |
396 | jermar | 47 | static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn); |
394 | jermar | 48 | |
391 | jermar | 49 | /** Initialize TLB |
50 | * |
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51 | * Initialize TLB. |
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52 | * Invalidate all entries and mark wired entries. |
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53 | */ |
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389 | jermar | 54 | void tlb_init_arch(void) |
55 | { |
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56 | int i; |
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57 | |||
58 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
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59 | cp0_entry_hi_write(0); |
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60 | cp0_entry_lo0_write(0); |
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61 | cp0_entry_lo1_write(0); |
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62 | |||
63 | /* |
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64 | * Invalidate all entries. |
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65 | */ |
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66 | for (i = 0; i < TLB_SIZE; i++) { |
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391 | jermar | 67 | cp0_index_write(i); |
389 | jermar | 68 | tlbwi(); |
69 | } |
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70 | |||
71 | /* |
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72 | * The kernel is going to make use of some wired |
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391 | jermar | 73 | * entries (e.g. mapping kernel stacks in kseg3). |
389 | jermar | 74 | */ |
75 | cp0_wired_write(TLB_WIRED); |
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76 | } |
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77 | |||
391 | jermar | 78 | /** Process TLB Refill Exception |
79 | * |
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80 | * Process TLB Refill Exception. |
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81 | * |
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82 | * @param pstate Interrupted register context. |
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83 | */ |
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317 | palkovsky | 84 | void tlb_refill(struct exception_regdump *pstate) |
1 | jermar | 85 | { |
396 | jermar | 86 | entry_lo_t lo; |
391 | jermar | 87 | __address badvaddr; |
88 | pte_t *pte; |
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89 | |||
90 | badvaddr = cp0_badvaddr_read(); |
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91 | |||
394 | jermar | 92 | spinlock_lock(&VM->lock); |
93 | pte = find_mapping_and_check(badvaddr); |
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94 | if (!pte) |
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391 | jermar | 95 | goto fail; |
96 | |||
97 | /* |
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394 | jermar | 98 | * Record access to PTE. |
391 | jermar | 99 | */ |
394 | jermar | 100 | pte->a = 1; |
391 | jermar | 101 | |
394 | jermar | 102 | prepare_entry_lo(&lo, pte->g, pte->v, pte->d, pte->c, pte->pfn); |
103 | |||
391 | jermar | 104 | /* |
105 | * New entry is to be inserted into TLB |
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106 | */ |
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107 | if ((badvaddr/PAGE_SIZE) % 2 == 0) { |
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396 | jermar | 108 | cp0_entry_lo0_write(lo.value); |
391 | jermar | 109 | cp0_entry_lo1_write(0); |
110 | } |
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111 | else { |
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112 | cp0_entry_lo0_write(0); |
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396 | jermar | 113 | cp0_entry_lo1_write(lo.value); |
391 | jermar | 114 | } |
115 | tlbwr(); |
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116 | |||
117 | spinlock_unlock(&VM->lock); |
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118 | return; |
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119 | |||
120 | fail: |
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121 | spinlock_unlock(&VM->lock); |
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122 | tlb_refill_fail(pstate); |
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123 | } |
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124 | |||
394 | jermar | 125 | /** Process TLB Invalid Exception |
126 | * |
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127 | * Process TLB Invalid Exception. |
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128 | * |
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129 | * @param pstate Interrupted register context. |
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130 | */ |
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391 | jermar | 131 | void tlb_invalid(struct exception_regdump *pstate) |
132 | { |
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396 | jermar | 133 | tlb_index_t index; |
394 | jermar | 134 | __address badvaddr; |
396 | jermar | 135 | entry_lo_t lo; |
394 | jermar | 136 | pte_t *pte; |
137 | |||
138 | badvaddr = cp0_badvaddr_read(); |
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139 | |||
140 | /* |
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141 | * Locate the faulting entry in TLB. |
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142 | */ |
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143 | tlbp(); |
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396 | jermar | 144 | index.value = cp0_index_read(); |
394 | jermar | 145 | |
146 | spinlock_lock(&VM->lock); |
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147 | |||
148 | /* |
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149 | * Fail if the entry is not in TLB. |
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150 | */ |
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396 | jermar | 151 | if (index.p) { |
152 | printf("TLB entry not found.\n"); |
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394 | jermar | 153 | goto fail; |
396 | jermar | 154 | } |
394 | jermar | 155 | |
156 | pte = find_mapping_and_check(badvaddr); |
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157 | if (!pte) |
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158 | goto fail; |
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159 | |||
160 | /* |
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161 | * Read the faulting TLB entry. |
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162 | */ |
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163 | tlbr(); |
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164 | |||
165 | /* |
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166 | * Record access to PTE. |
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167 | */ |
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168 | pte->a = 1; |
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169 | |||
170 | prepare_entry_lo(&lo, pte->g, pte->v, pte->d, pte->c, pte->pfn); |
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171 | |||
172 | /* |
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173 | * The entry is to be updated in TLB. |
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174 | */ |
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175 | if ((badvaddr/PAGE_SIZE) % 2 == 0) |
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396 | jermar | 176 | cp0_entry_lo0_write(lo.value); |
394 | jermar | 177 | else |
396 | jermar | 178 | cp0_entry_lo1_write(lo.value); |
394 | jermar | 179 | tlbwi(); |
180 | |||
181 | spinlock_unlock(&VM->lock); |
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182 | return; |
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183 | |||
184 | fail: |
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185 | spinlock_unlock(&VM->lock); |
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391 | jermar | 186 | tlb_invalid_fail(pstate); |
187 | } |
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188 | |||
394 | jermar | 189 | /** Process TLB Modified Exception |
190 | * |
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191 | * Process TLB Modified Exception. |
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192 | * |
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193 | * @param pstate Interrupted register context. |
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194 | */ |
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391 | jermar | 195 | void tlb_modified(struct exception_regdump *pstate) |
196 | { |
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396 | jermar | 197 | tlb_index_t index; |
394 | jermar | 198 | __address badvaddr; |
396 | jermar | 199 | entry_lo_t lo; |
394 | jermar | 200 | pte_t *pte; |
201 | |||
202 | badvaddr = cp0_badvaddr_read(); |
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203 | |||
204 | /* |
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205 | * Locate the faulting entry in TLB. |
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206 | */ |
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207 | tlbp(); |
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396 | jermar | 208 | index.value = cp0_index_read(); |
394 | jermar | 209 | |
210 | spinlock_lock(&VM->lock); |
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211 | |||
212 | /* |
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213 | * Fail if the entry is not in TLB. |
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214 | */ |
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396 | jermar | 215 | if (index.p) { |
216 | printf("TLB entry not found.\n"); |
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394 | jermar | 217 | goto fail; |
396 | jermar | 218 | } |
394 | jermar | 219 | |
220 | pte = find_mapping_and_check(badvaddr); |
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221 | if (!pte) |
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222 | goto fail; |
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223 | |||
224 | /* |
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225 | * Fail if the page is not writable. |
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226 | */ |
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227 | if (!pte->w) |
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228 | goto fail; |
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229 | |||
230 | /* |
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231 | * Read the faulting TLB entry. |
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232 | */ |
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233 | tlbr(); |
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234 | |||
235 | /* |
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236 | * Record access and write to PTE. |
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237 | */ |
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238 | pte->a = 1; |
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239 | pte->d = 1; |
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240 | |||
241 | prepare_entry_lo(&lo, pte->g, pte->v, pte->w, pte->c, pte->pfn); |
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242 | |||
243 | /* |
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244 | * The entry is to be updated in TLB. |
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245 | */ |
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246 | if ((badvaddr/PAGE_SIZE) % 2 == 0) |
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396 | jermar | 247 | cp0_entry_lo0_write(lo.value); |
394 | jermar | 248 | else |
396 | jermar | 249 | cp0_entry_lo1_write(lo.value); |
394 | jermar | 250 | tlbwi(); |
251 | |||
252 | spinlock_unlock(&VM->lock); |
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253 | return; |
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254 | |||
255 | fail: |
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256 | spinlock_unlock(&VM->lock); |
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391 | jermar | 257 | tlb_modified_fail(pstate); |
258 | } |
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259 | |||
260 | void tlb_refill_fail(struct exception_regdump *pstate) |
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261 | { |
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324 | palkovsky | 262 | char *symbol = ""; |
263 | char *sym2 = ""; |
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264 | |||
332 | palkovsky | 265 | char *s = get_symtab_entry(pstate->epc); |
266 | if (s) |
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267 | symbol = s; |
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268 | s = get_symtab_entry(pstate->ra); |
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269 | if (s) |
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270 | sym2 = s; |
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391 | jermar | 271 | panic("%X: TLB Refill Exception at %X(%s<-%s)\n", cp0_badvaddr_read(), pstate->epc, symbol, sym2); |
1 | jermar | 272 | } |
273 | |||
391 | jermar | 274 | |
275 | void tlb_invalid_fail(struct exception_regdump *pstate) |
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1 | jermar | 276 | { |
268 | palkovsky | 277 | char *symbol = ""; |
278 | |||
332 | palkovsky | 279 | char *s = get_symtab_entry(pstate->epc); |
280 | if (s) |
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281 | symbol = s; |
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394 | jermar | 282 | panic("%X: TLB Invalid Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
1 | jermar | 283 | } |
284 | |||
391 | jermar | 285 | void tlb_modified_fail(struct exception_regdump *pstate) |
389 | jermar | 286 | { |
287 | char *symbol = ""; |
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288 | |||
289 | char *s = get_symtab_entry(pstate->epc); |
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290 | if (s) |
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291 | symbol = s; |
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394 | jermar | 292 | panic("%X: TLB Modified Exception at %X(%s)\n", cp0_badvaddr_read(), pstate->epc, symbol); |
389 | jermar | 293 | } |
294 | |||
396 | jermar | 295 | /** Invalidate TLB entries with specified ASID |
296 | * |
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297 | * Invalidate TLB entries with specified ASID. |
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298 | * |
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299 | * @param asid ASID. |
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300 | */ |
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301 | void tlb_invalidate(asid_t asid) |
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1 | jermar | 302 | { |
396 | jermar | 303 | entry_hi_t hi; |
130 | decky | 304 | pri_t pri; |
396 | jermar | 305 | int i; |
130 | decky | 306 | |
396 | jermar | 307 | ASSERT(asid != ASID_INVALID); |
308 | |||
130 | decky | 309 | pri = cpu_priority_high(); |
310 | |||
396 | jermar | 311 | for (i = 0; i < TLB_SIZE; i++) { |
312 | cp0_index_write(i); |
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313 | tlbr(); |
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314 | |||
315 | hi.value = cp0_entry_hi_read(); |
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316 | if (hi.asid == asid) { |
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317 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
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318 | cp0_entry_hi_write(0); |
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319 | cp0_entry_lo0_write(0); |
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320 | cp0_entry_lo1_write(0); |
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321 | tlbwi(); |
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322 | } |
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323 | } |
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130 | decky | 324 | |
325 | cpu_priority_restore(pri); |
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1 | jermar | 326 | } |
394 | jermar | 327 | |
328 | /** Try to find PTE for faulting address |
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329 | * |
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330 | * Try to find PTE for faulting address. |
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331 | * The VM->lock must be held on entry to this function. |
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332 | * |
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333 | * @param badvaddr Faulting virtual address. |
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334 | * |
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335 | * @return PTE on success, NULL otherwise. |
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336 | */ |
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337 | pte_t *find_mapping_and_check(__address badvaddr) |
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338 | { |
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396 | jermar | 339 | entry_hi_t hi; |
394 | jermar | 340 | pte_t *pte; |
341 | |||
396 | jermar | 342 | hi.value = cp0_entry_hi_read(); |
394 | jermar | 343 | |
344 | /* |
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345 | * Handler cannot succeed if the ASIDs don't match. |
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346 | */ |
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396 | jermar | 347 | if (hi.asid != VM->asid) { |
348 | printf("EntryHi.asid=%d, VM->asid=%d\n", hi.asid, VM->asid); |
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394 | jermar | 349 | return NULL; |
396 | jermar | 350 | } |
394 | jermar | 351 | |
352 | /* |
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353 | * Handler cannot succeed if badvaddr has no mapping. |
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354 | */ |
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355 | pte = find_mapping(badvaddr, 0); |
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396 | jermar | 356 | if (!pte) { |
357 | printf("No such mapping.\n"); |
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394 | jermar | 358 | return NULL; |
396 | jermar | 359 | } |
394 | jermar | 360 | |
361 | /* |
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362 | * Handler cannot succeed if the mapping is marked as invalid. |
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363 | */ |
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396 | jermar | 364 | if (!pte->v) { |
365 | printf("Invalid mapping.\n"); |
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394 | jermar | 366 | return NULL; |
396 | jermar | 367 | } |
394 | jermar | 368 | |
369 | return pte; |
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370 | } |
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371 | |||
396 | jermar | 372 | void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, int c, __address pfn) |
394 | jermar | 373 | { |
374 | lo->g = g; |
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375 | lo->v = v; |
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376 | lo->d = d; |
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377 | lo->c = c; |
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378 | lo->pfn = pfn; |
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379 | lo->zero = 0; |
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380 | } |