Subversion Repositories HelenOS

Rev

Rev 3913 | Rev 4039 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
1 jermar 1
#
2071 jermar 2
# Copyright (c) 2003-2004 Jakub Jermar
1 jermar 3
# All rights reserved.
4
#
5
# Redistribution and use in source and binary forms, with or without
6
# modification, are permitted provided that the following conditions
7
# are met:
8
#
9
# - Redistributions of source code must retain the above copyright
10
#   notice, this list of conditions and the following disclaimer.
11
# - Redistributions in binary form must reproduce the above copyright
12
#   notice, this list of conditions and the following disclaimer in the
13
#   documentation and/or other materials provided with the distribution.
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
16
#
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
#
28
 
326 palkovsky 29
#include <arch/asm/regname.h>
3913 decky 30
 
1 jermar 31
.text
32
 
33
.macro cp0_read reg
50 jermar 34
	mfc0 $2,\reg
35
	j $31
36
	nop
1 jermar 37
.endm
38
 
39
.macro cp0_write reg
50 jermar 40
	mtc0 $4,\reg
41
	j $31
42
	nop
1 jermar 43
.endm
44
 
45
.set noat
46
.set noreorder
47
.set nomacro
48
 
3913 decky 49
.global asm_delay_loop
50
asm_delay_loop:
51
	j $31
52
	nop
53
 
1 jermar 54
.global cpu_halt
55
cpu_halt:
56
	j cpu_halt
57
	nop
58
 
59
 
59 jermar 60
.global memsetb
61
memsetb:
62
	j _memsetb
63
	nop
64
 
1288 jermar 65
 
205 jermar 66
.global memcpy
1288 jermar 67
.global memcpy_from_uspace
68
.global memcpy_to_uspace
69
.global memcpy_from_uspace_failover_address
70
.global memcpy_to_uspace_failover_address
205 jermar 71
memcpy:
1288 jermar 72
memcpy_from_uspace:
73
memcpy_to_uspace:
4038 decky 74
	move	$t2,$a0			# save dst
1615 jermar 75
	addiu	$v0,$a1,3
76
	li	$v1,-4			# 0xfffffffffffffffc
77
	and	$v0,$v0,$v1
78
	beq	$a1,$v0,3f
79
	move	$t0,$a0
105 jermar 80
 
1615 jermar 81
0:
82
	beq	$a2,$zero,2f
83
	move	$a3,$zero
84
 
85
1:
86
	addu	$v0,$a1,$a3
87
	lbu	$a0,0($v0)
88
	addu	$v1,$t0,$a3
89
	addiu	$a3,$a3,1
90
	bne	$a3,$a2,1b
91
	sb	$a0,0($v1)
92
 
93
2:
94
	jr	$ra
3274 jermar 95
	move	$v0,$t2
1615 jermar 96
 
97
3:
98
	addiu	$v0,$a0,3
99
	and	$v0,$v0,$v1
100
	bne	$a0,$v0,0b
101
	srl	$t1,$a2,2
102
 
103
	beq	$t1,$zero,5f
104
	move	$a3,$zero
105
 
106
	move	$a3,$zero
107
	move	$a0,$zero
108
4:
109
	addu	$v0,$a1,$a0
110
	lw	$v1,0($v0)
111
	addiu	$a3,$a3,1
112
	addu	$v0,$t0,$a0
113
	sw	$v1,0($v0)
114
	bne	$a3,$t1,4b
115
	addiu	$a0,$a0,4
116
 
117
5:
118
	andi	$a2,$a2,0x3
119
	beq	$a2,$zero,2b
120
	nop
121
 
122
	sll	$v0,$a3,2
123
	addu	$t1,$v0,$t0
124
	move	$a3,$zero
125
	addu	$t0,$v0,$a1
126
6:
127
	addu	$v0,$t0,$a3
128
	lbu	$a0,0($v0)
129
	addu	$v1,$t1,$a3
130
	addiu	$a3,$a3,1
131
	bne	$a3,$a2,6b
132
	sb	$a0,0($v1)
133
 
134
	jr	$ra
3274 jermar 135
	move	$v0,$t2
1615 jermar 136
 
1288 jermar 137
memcpy_from_uspace_failover_address:
138
memcpy_to_uspace_failover_address:
1293 palkovsky 139
	jr	$ra
140
	move	$v0, $zero
1288 jermar 141
 
142
 
143
 
326 palkovsky 144
.macro fpu_gp_save reg ctx
145
	mfc1 $t0,$\reg
146
	sw $t0, \reg*4(\ctx)
147
.endm
148
 
149
.macro fpu_gp_restore reg ctx
150
	lw $t0, \reg*4(\ctx)
151
	mtc1 $t0,$\reg
152
.endm
153
 
154
.macro fpu_ct_save reg ctx
155
	cfc1 $t0,$1
156
	sw $t0, (\reg+32)*4(\ctx)
157
.endm	
158
 
159
.macro fpu_ct_restore reg ctx
160
	lw $t0, (\reg+32)*4(\ctx)
161
	ctc1 $t0,$\reg
162
.endm
163
 
164
 
165
.global fpu_context_save
166
fpu_context_save:
3880 decky 167
#ifdef CONFIG_FPU
326 palkovsky 168
	fpu_gp_save 0,$a0
169
	fpu_gp_save 1,$a0
170
	fpu_gp_save 2,$a0
171
	fpu_gp_save 3,$a0
172
	fpu_gp_save 4,$a0
173
	fpu_gp_save 5,$a0
174
	fpu_gp_save 6,$a0
175
	fpu_gp_save 7,$a0
176
	fpu_gp_save 8,$a0
177
	fpu_gp_save 9,$a0
178
	fpu_gp_save 10,$a0
179
	fpu_gp_save 11,$a0
180
	fpu_gp_save 12,$a0
181
	fpu_gp_save 13,$a0
182
	fpu_gp_save 14,$a0
183
	fpu_gp_save 15,$a0
184
	fpu_gp_save 16,$a0
185
	fpu_gp_save 17,$a0
186
	fpu_gp_save 18,$a0
187
	fpu_gp_save 19,$a0
188
	fpu_gp_save 20,$a0
189
	fpu_gp_save 21,$a0
190
	fpu_gp_save 22,$a0
191
	fpu_gp_save 23,$a0
192
	fpu_gp_save 24,$a0
193
	fpu_gp_save 25,$a0
194
	fpu_gp_save 26,$a0
195
	fpu_gp_save 27,$a0
196
	fpu_gp_save 28,$a0
197
	fpu_gp_save 29,$a0
198
	fpu_gp_save 30,$a0
199
	fpu_gp_save 31,$a0
200
 
201
	fpu_ct_save 1,$a0
202
	fpu_ct_save 2,$a0
203
	fpu_ct_save 3,$a0
204
	fpu_ct_save 4,$a0
205
	fpu_ct_save 5,$a0
206
	fpu_ct_save 6,$a0
207
	fpu_ct_save 7,$a0
208
	fpu_ct_save 8,$a0
209
	fpu_ct_save 9,$a0
210
	fpu_ct_save 10,$a0
211
	fpu_ct_save 11,$a0
212
	fpu_ct_save 12,$a0
213
	fpu_ct_save 13,$a0
214
	fpu_ct_save 14,$a0
215
	fpu_ct_save 15,$a0
216
	fpu_ct_save 16,$a0
217
	fpu_ct_save 17,$a0
218
	fpu_ct_save 18,$a0
219
	fpu_ct_save 19,$a0
220
	fpu_ct_save 20,$a0
221
	fpu_ct_save 21,$a0
222
	fpu_ct_save 22,$a0
223
	fpu_ct_save 23,$a0
224
	fpu_ct_save 24,$a0
225
	fpu_ct_save 25,$a0
226
	fpu_ct_save 26,$a0
227
	fpu_ct_save 27,$a0
228
	fpu_ct_save 28,$a0
229
	fpu_ct_save 29,$a0
230
	fpu_ct_save 30,$a0
231
	fpu_ct_save 31,$a0
232
#endif		
233
	j $ra
234
	nop
235
 
236
.global fpu_context_restore
237
fpu_context_restore:
3880 decky 238
#ifdef CONFIG_FPU
326 palkovsky 239
	fpu_gp_restore 0,$a0
240
	fpu_gp_restore 1,$a0
241
	fpu_gp_restore 2,$a0
242
	fpu_gp_restore 3,$a0
243
	fpu_gp_restore 4,$a0
244
	fpu_gp_restore 5,$a0
245
	fpu_gp_restore 6,$a0
246
	fpu_gp_restore 7,$a0
247
	fpu_gp_restore 8,$a0
248
	fpu_gp_restore 9,$a0
249
	fpu_gp_restore 10,$a0
250
	fpu_gp_restore 11,$a0
251
	fpu_gp_restore 12,$a0
252
	fpu_gp_restore 13,$a0
253
	fpu_gp_restore 14,$a0
254
	fpu_gp_restore 15,$a0
255
	fpu_gp_restore 16,$a0
256
	fpu_gp_restore 17,$a0
257
	fpu_gp_restore 18,$a0
258
	fpu_gp_restore 19,$a0
259
	fpu_gp_restore 20,$a0
260
	fpu_gp_restore 21,$a0
261
	fpu_gp_restore 22,$a0
262
	fpu_gp_restore 23,$a0
263
	fpu_gp_restore 24,$a0
264
	fpu_gp_restore 25,$a0
265
	fpu_gp_restore 26,$a0
266
	fpu_gp_restore 27,$a0
267
	fpu_gp_restore 28,$a0
268
	fpu_gp_restore 29,$a0
269
	fpu_gp_restore 30,$a0
270
	fpu_gp_restore 31,$a0
271
 
272
	fpu_ct_restore 1,$a0
273
	fpu_ct_restore 2,$a0
274
	fpu_ct_restore 3,$a0
275
	fpu_ct_restore 4,$a0
276
	fpu_ct_restore 5,$a0
277
	fpu_ct_restore 6,$a0
278
	fpu_ct_restore 7,$a0
279
	fpu_ct_restore 8,$a0
280
	fpu_ct_restore 9,$a0
281
	fpu_ct_restore 10,$a0
282
	fpu_ct_restore 11,$a0
283
	fpu_ct_restore 12,$a0
284
	fpu_ct_restore 13,$a0
285
	fpu_ct_restore 14,$a0
286
	fpu_ct_restore 15,$a0
287
	fpu_ct_restore 16,$a0
288
	fpu_ct_restore 17,$a0
289
	fpu_ct_restore 18,$a0
290
	fpu_ct_restore 19,$a0
291
	fpu_ct_restore 20,$a0
292
	fpu_ct_restore 21,$a0
293
	fpu_ct_restore 22,$a0
294
	fpu_ct_restore 23,$a0
295
	fpu_ct_restore 24,$a0
296
	fpu_ct_restore 25,$a0
297
	fpu_ct_restore 26,$a0
298
	fpu_ct_restore 27,$a0
299
	fpu_ct_restore 28,$a0
300
	fpu_ct_restore 29,$a0
301
	fpu_ct_restore 30,$a0
302
	fpu_ct_restore 31,$a0
303
#endif	
304
	j $ra
305
	nop