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1 | jermar | 1 | /* |
319 | jermar | 2 | * Copyright (C) 2003-2004 Jakub Jermar |
1 | jermar | 3 | * All rights reserved. |
4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
341 | jermar | 29 | #ifndef __mips32_TLB_H__ |
30 | #define __mips32_TLB_H__ |
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1 | jermar | 31 | |
317 | palkovsky | 32 | #include <arch/exception.h> |
33 | |||
389 | jermar | 34 | #define TLB_SIZE 48 |
35 | |||
36 | #define TLB_WIRED 1 |
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37 | #define TLB_KSTACK_WIRED_INDEX 0 |
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38 | |||
39 | #define TLB_PAGE_MASK_16K (0x3<<13) |
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40 | |||
121 | jermar | 41 | #define PAGE_UNCACHED 2 |
42 | #define PAGE_CACHEABLE_EXC_WRITE 5 |
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43 | |||
396 | jermar | 44 | union entry_lo { |
45 | struct { |
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46 | unsigned g : 1; /* global bit */ |
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47 | unsigned v : 1; /* valid bit */ |
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48 | unsigned d : 1; /* dirty/write-protect bit */ |
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49 | unsigned c : 3; /* cache coherency attribute */ |
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50 | unsigned pfn : 24; /* frame number */ |
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399 | jermar | 51 | unsigned : 2; /* zero */ |
396 | jermar | 52 | } __attribute__ ((packed)); |
53 | __u32 value; |
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54 | }; |
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1 | jermar | 55 | |
394 | jermar | 56 | struct pte { |
57 | unsigned g : 1; /* global bit */ |
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58 | unsigned v : 1; /* valid bit */ |
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59 | unsigned d : 1; /* dirty/write-protect bit */ |
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60 | unsigned c : 3; /* cache coherency attribute */ |
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61 | unsigned pfn : 24; /* frame number */ |
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62 | unsigned w : 1; /* writable */ |
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63 | unsigned a : 1; /* accessed */ |
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64 | } __attribute__ ((packed)); |
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65 | |||
396 | jermar | 66 | union entry_hi { |
67 | struct { |
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68 | unsigned asid : 8; |
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69 | unsigned : 5; |
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70 | unsigned vpn2 : 19; |
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71 | } __attribute__ ((packed)); |
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72 | __u32 value; |
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73 | }; |
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1 | jermar | 74 | |
396 | jermar | 75 | union page_mask { |
76 | struct { |
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77 | unsigned : 13; |
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78 | unsigned mask : 12; |
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79 | unsigned : 7; |
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80 | } __attribute__ ((packed)); |
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81 | __u32 value; |
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82 | }; |
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1 | jermar | 83 | |
396 | jermar | 84 | union index { |
85 | struct { |
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86 | unsigned index : 4; |
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87 | unsigned : 27; |
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88 | unsigned p : 1; |
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89 | } __attribute__ ((packed)); |
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90 | __u32 value; |
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91 | }; |
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1 | jermar | 92 | |
396 | jermar | 93 | typedef union entry_lo entry_lo_t; |
94 | typedef union entry_hi entry_hi_t; |
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95 | typedef union page_mask page_mask_t; |
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96 | typedef union index tlb_index_t; |
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97 | |||
394 | jermar | 98 | /** Probe TLB for Matching Entry |
99 | * |
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100 | * Probe TLB for Matching Entry. |
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101 | */ |
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102 | static inline void tlbp(void) |
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103 | { |
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104 | __asm__ volatile ("tlbp\n\t"); |
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105 | } |
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121 | jermar | 106 | |
394 | jermar | 107 | |
389 | jermar | 108 | /** Read Indexed TLB Entry |
109 | * |
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110 | * Read Indexed TLB Entry. |
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111 | */ |
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112 | static inline void tlbr(void) |
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113 | { |
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114 | __asm__ volatile ("tlbr\n\t"); |
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115 | } |
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116 | |||
117 | /** Write Indexed TLB Entry |
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118 | * |
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119 | * Write Indexed TLB Entry. |
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120 | */ |
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121 | static inline void tlbwi(void) |
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122 | { |
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123 | __asm__ volatile ("tlbwi\n\t"); |
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124 | } |
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125 | |||
126 | /** Write Random TLB Entry |
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127 | * |
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128 | * Write Random TLB Entry. |
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129 | */ |
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130 | static inline void tlbwr(void) |
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131 | { |
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132 | __asm__ volatile ("tlbwr\n\t"); |
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133 | } |
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134 | |||
317 | palkovsky | 135 | extern void tlb_invalid(struct exception_regdump *pstate); |
136 | extern void tlb_refill(struct exception_regdump *pstate); |
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389 | jermar | 137 | extern void tlb_modified(struct exception_regdump *pstate); |
1 | jermar | 138 | |
139 | #endif |