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| 1 | jermar | 1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
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| 3 | * All rights reserved. |
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| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 29 | #ifndef __MIPS_ATOMIC_H__ |
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| 30 | #define __MIPS_ATOMIC_H__ |
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| 31 | |||
| 111 | palkovsky | 32 | #define atomic_inc(x) (a_add(x,1)) |
| 33 | #define atomic_dec(x) (a_sub(x,1)) |
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| 1 | jermar | 34 | |
| 111 | palkovsky | 35 | /* |
| 36 | * Atomic addition |
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| 37 | * |
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| 38 | * This case is harder, and we have to use the special LL and SC operations |
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| 39 | * to achieve atomicity. The instructions are similar to LW (load) and SW |
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| 40 | * (store), except that the LL (load-linked) instruction loads the address |
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| 41 | * of the variable to a special register and if another process writes to |
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| 42 | * the same location, the SC (store-conditional) instruction fails. |
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| 43 | */ |
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| 44 | static inline int a_add( volatile int *val, int i) |
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| 45 | { |
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| 46 | int tmp, tmp2; |
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| 47 | |||
| 48 | asm volatile ( |
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| 49 | " .set push\n" |
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| 50 | " .set noreorder\n" |
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| 51 | " nop\n" |
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| 52 | "1:\n" |
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| 53 | " ll %0, %1\n" |
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| 54 | " addu %0, %0, %2\n" |
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| 55 | " move %3, %0\n" |
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| 56 | " sc %0, %1\n" |
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| 57 | " beq %0, 0x0, 1b\n" |
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| 58 | " move %0, %3\n" |
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| 59 | " .set pop\n" |
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| 60 | : "=&r" (tmp), "=o" (*val) |
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| 61 | : "r" (i), "r" (tmp2) |
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| 62 | ); |
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| 63 | return tmp; |
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| 64 | } |
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| 65 | |||
| 66 | |||
| 67 | /* |
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| 68 | * Atomic subtraction |
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| 69 | * |
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| 70 | * Implemented in the same manner as a_add, except we substract the value. |
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| 71 | */ |
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| 72 | static inline int a_sub( volatile int *val, int i) |
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| 73 | |||
| 74 | { |
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| 75 | int tmp, tmp2; |
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| 76 | |||
| 77 | asm volatile ( |
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| 78 | " .set push\n" |
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| 79 | " .set noreorder\n" |
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| 80 | " nop\n" |
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| 81 | "1:\n" |
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| 82 | " ll %0, %1\n" |
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| 83 | " subu %0, %0, %2\n" |
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| 84 | " move %3, %0\n" |
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| 85 | " sc %0, %1\n" |
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| 86 | " beq %0, 0x0, 1b\n" |
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| 87 | " move %0, %3\n" |
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| 88 | " .set pop\n" |
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| 89 | : "=&r" (tmp), "=o" (*val) |
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| 90 | : "r" (i), "r" (tmp2) |
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| 91 | ); |
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| 92 | return tmp; |
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| 93 | } |
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| 94 | |||
| 95 | |||
| 1 | jermar | 96 | #endif |