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684 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2006 Jakub Jermar
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 * Copyright (c) 2006 Jakub Vana
684 jermar 4
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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1888 jermar 30
/** @addtogroup ia64mm 
1702 cejka 31
 * @{
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 */
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/** @file
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 */
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684 jermar 36
#include <arch/mm/page.h>
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#include <genarch/mm/page_ht.h>
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#include <mm/asid.h>
749 jermar 39
#include <arch/mm/asid.h>
1210 vana 40
#include <arch/mm/vhpt.h>
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#include <arch/types.h>
728 vana 42
#include <print.h>
684 jermar 43
#include <mm/page.h>
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#include <mm/frame.h>
684 jermar 45
#include <config.h>
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#include <panic.h>
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#include <arch/asm.h>
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#include <arch/barrier.h>
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#include <memstr.h>
3578 vana 50
#include <align.h>
684 jermar 51
 
792 jermar 52
static void set_environment(void);
749 jermar 53
 
54
/** Initialize ia64 virtual address translation subsystem. */
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void page_arch_init(void)
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{
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    page_mapping_operations = &ht_mapping_operations;
749 jermar 58
    pk_disable();
792 jermar 59
    set_environment();
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}
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747 jermar 62
/** Initialize VHPT and region registers. */
792 jermar 63
void set_environment(void)
716 vana 64
{
747 jermar 65
    region_register rr;
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    pta_register pta;  
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    int i;
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#ifdef CONFIG_VHPT  
1780 jermar 69
    uintptr_t vhpt_base;
1210 vana 70
#endif
869 vana 71
 
747 jermar 72
    /*
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     * First set up kernel region register.
901 jermar 74
     * This is redundant (see start.S) but we keep it here just for sure.
747 jermar 75
     */
76
    rr.word = rr_read(VRN_KERNEL);
77
    rr.map.ve = 0;                  /* disable VHPT walker */
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    rr.map.ps = PAGE_WIDTH;
901 jermar 79
    rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
747 jermar 80
    rr_write(VRN_KERNEL, rr.word);
81
    srlz_i();
82
    srlz_d();
901 jermar 83
 
747 jermar 84
    /*
902 jermar 85
     * And setup the rest of region register.
747 jermar 86
     */
87
    for(i = 0; i < REGION_REGISTERS; i++) {
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        /* skip kernel rr */
89
        if (i == VRN_KERNEL)
90
            continue;
728 vana 91
 
904 jermar 92
        rr.word = rr_read(i);
748 jermar 93
        rr.map.ve = 0;      /* disable VHPT walker */
902 jermar 94
        rr.map.rid = RID_KERNEL;
95
        rr.map.ps = PAGE_WIDTH;
747 jermar 96
        rr_write(i, rr.word);
97
        srlz_i();
98
        srlz_d();
99
    }
726 jermar 100
 
1210 vana 101
#ifdef CONFIG_VHPT  
102
    vhpt_base = vhpt_set_up();
103
#endif
715 vana 104
    /*
747 jermar 105
     * Set up PTA register.
106
     */
107
    pta.word = pta_read();
1210 vana 108
#ifndef CONFIG_VHPT
747 jermar 109
    pta.map.ve = 0;                   /* disable VHPT walker */
1210 vana 110
    pta.map.base = 0 >> PTA_BASE_SHIFT;
111
#else
112
    pta.map.ve = 1;                   /* enable VHPT walker */
113
    pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
114
#endif
747 jermar 115
    pta.map.vf = 1;                   /* large entry format */
116
    pta.map.size = VHPT_WIDTH;
117
    pta_write(pta.word);
118
    srlz_i();
119
    srlz_d();
120
}
728 vana 121
 
748 jermar 122
/** Calculate address of collision chain from VPN and ASID.
123
 *
749 jermar 124
 * Interrupts must be disabled.
748 jermar 125
 *
126
 * @param page Address of virtual page including VRN bits.
127
 * @param asid Address space identifier.
128
 *
792 jermar 129
 * @return VHPT entry address.
748 jermar 130
 */
1780 jermar 131
vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
748 jermar 132
{
133
    region_register rr_save, rr;
749 jermar 134
    index_t vrn;
135
    rid_t rid;
792 jermar 136
    vhpt_entry_t *v;
748 jermar 137
 
749 jermar 138
    vrn = page >> VRN_SHIFT;
139
    rid = ASID2RID(asid, vrn);
140
 
141
    rr_save.word = rr_read(vrn);
142
    if (rr_save.map.rid == rid) {
143
        /*
144
         * The RID is already in place, compute thash and return.
145
         */
792 jermar 146
        v = (vhpt_entry_t *) thash(page);
147
        return v;
749 jermar 148
    }
149
 
150
    /*
151
     * The RID must be written to some region register.
152
     * To speed things up, register indexed by vrn is used.
153
     */
748 jermar 154
    rr.word = rr_save.word;
749 jermar 155
    rr.map.rid = rid;
156
    rr_write(vrn, rr.word);
748 jermar 157
    srlz_i();
792 jermar 158
    v = (vhpt_entry_t *) thash(page);
749 jermar 159
    rr_write(vrn, rr_save.word);
748 jermar 160
    srlz_i();
161
    srlz_d();
162
 
792 jermar 163
    return v;
748 jermar 164
}
749 jermar 165
 
166
/** Compare ASID and VPN against PTE.
167
 *
168
 * Interrupts must be disabled.
169
 *
170
 * @param page Address of virtual page including VRN bits.
171
 * @param asid Address space identifier.
172
 *
173
 * @return True if page and asid match the page and asid of t, false otherwise.
174
 */
1780 jermar 175
bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
749 jermar 176
{
177
    region_register rr_save, rr;   
178
    index_t vrn;
179
    rid_t rid;
180
    bool match;
181
 
792 jermar 182
    ASSERT(v);
749 jermar 183
 
184
    vrn = page >> VRN_SHIFT;
185
    rid = ASID2RID(asid, vrn);
186
 
187
    rr_save.word = rr_read(vrn);
188
    if (rr_save.map.rid == rid) {
189
        /*
190
         * The RID is already in place, compare ttag with t and return.
191
         */
792 jermar 192
        return ttag(page) == v->present.tag.tag_word;
749 jermar 193
    }
194
 
195
    /*
196
     * The RID must be written to some region register.
197
     * To speed things up, register indexed by vrn is used.
198
     */
199
    rr.word = rr_save.word;
200
    rr.map.rid = rid;
201
    rr_write(vrn, rr.word);
202
    srlz_i();
792 jermar 203
    match = (ttag(page) == v->present.tag.tag_word);
749 jermar 204
    rr_write(vrn, rr_save.word);
205
    srlz_i();
206
    srlz_d();
207
 
208
    return match;      
209
}
210
 
211
/** Set up one VHPT entry.
212
 *
1708 jermar 213
 * @param v VHPT entry to be set up.
749 jermar 214
 * @param page Virtual address of the page mapped by the entry.
215
 * @param asid Address space identifier of the address space to which page belongs.
216
 * @param frame Physical address of the frame to wich page is mapped.
217
 * @param flags Different flags for the mapping.
218
 */
1780 jermar 219
void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags)
749 jermar 220
{
221
    region_register rr_save, rr;   
222
    index_t vrn;
223
    rid_t rid;
1780 jermar 224
    uint64_t tag;
749 jermar 225
 
792 jermar 226
    ASSERT(v);
749 jermar 227
 
228
    vrn = page >> VRN_SHIFT;
229
    rid = ASID2RID(asid, vrn);
230
 
231
    /*
232
     * Compute ttag.
233
     */
234
    rr_save.word = rr_read(vrn);
235
    rr.word = rr_save.word;
236
    rr.map.rid = rid;
237
    rr_write(vrn, rr.word);
238
    srlz_i();
239
    tag = ttag(page);
240
    rr_write(vrn, rr_save.word);
241
    srlz_i();
242
    srlz_d();
243
 
244
    /*
245
     * Clear the entry.
246
     */
792 jermar 247
    v->word[0] = 0;
248
    v->word[1] = 0;
249
    v->word[2] = 0;
250
    v->word[3] = 0;
749 jermar 251
 
792 jermar 252
    v->present.p = true;
253
    v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
254
    v->present.a = false;   /* not accessed */
255
    v->present.d = false;   /* not dirty */
256
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
257
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
258
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
259
    v->present.ppn = frame >> PPN_SHIFT;
260
    v->present.ed = false;  /* exception not deffered */
261
    v->present.ps = PAGE_WIDTH;
262
    v->present.key = 0;
263
    v->present.tag.tag_word = tag;
749 jermar 264
}
1702 cejka 265
 
3578 vana 266
extern uintptr_t last_frame;
267
 
268
 
269
uintptr_t hw_map(uintptr_t physaddr, size_t size)
270
{
271
    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
272
        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
273
 
274
    uintptr_t virtaddr = PA2KA(last_frame);
275
    pfn_t i;
276
    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {
277
        uintptr_t addr = PFN2ADDR(i);
278
        page_mapping_insert(AS_KERNEL, virtaddr + addr, physaddr + addr, PAGE_NOT_CACHEABLE | PAGE_WRITE);
279
    }
280
 
281
    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
282
 
283
    return virtaddr;
284
}
285
 
286
 
287
 
1888 jermar 288
/** @}
1702 cejka 289
 */