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684 | jermar | 1 | /* |
2071 | jermar | 2 | * Copyright (c) 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Vana |
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684 | jermar | 4 | * All rights reserved. |
5 | * |
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6 | * Redistribution and use in source and binary forms, with or without |
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7 | * modification, are permitted provided that the following conditions |
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8 | * are met: |
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9 | * |
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10 | * - Redistributions of source code must retain the above copyright |
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11 | * notice, this list of conditions and the following disclaimer. |
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12 | * - Redistributions in binary form must reproduce the above copyright |
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13 | * notice, this list of conditions and the following disclaimer in the |
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14 | * documentation and/or other materials provided with the distribution. |
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15 | * - The name of the author may not be used to endorse or promote products |
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16 | * derived from this software without specific prior written permission. |
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17 | * |
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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28 | */ |
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29 | |||
1888 | jermar | 30 | /** @addtogroup ia64mm |
1702 | cejka | 31 | * @{ |
32 | */ |
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33 | /** @file |
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34 | */ |
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35 | |||
684 | jermar | 36 | #include <arch/mm/page.h> |
747 | jermar | 37 | #include <genarch/mm/page_ht.h> |
38 | #include <mm/asid.h> |
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749 | jermar | 39 | #include <arch/mm/asid.h> |
1210 | vana | 40 | #include <arch/mm/vhpt.h> |
716 | vana | 41 | #include <arch/types.h> |
728 | vana | 42 | #include <print.h> |
684 | jermar | 43 | #include <mm/page.h> |
747 | jermar | 44 | #include <mm/frame.h> |
684 | jermar | 45 | #include <config.h> |
46 | #include <panic.h> |
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746 | jermar | 47 | #include <arch/asm.h> |
747 | jermar | 48 | #include <arch/barrier.h> |
748 | jermar | 49 | #include <memstr.h> |
684 | jermar | 50 | |
792 | jermar | 51 | static void set_environment(void); |
749 | jermar | 52 | |
53 | /** Initialize ia64 virtual address translation subsystem. */ |
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54 | void page_arch_init(void) |
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55 | { |
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793 | jermar | 56 | page_mapping_operations = &ht_mapping_operations; |
749 | jermar | 57 | pk_disable(); |
792 | jermar | 58 | set_environment(); |
749 | jermar | 59 | } |
60 | |||
747 | jermar | 61 | /** Initialize VHPT and region registers. */ |
792 | jermar | 62 | void set_environment(void) |
716 | vana | 63 | { |
747 | jermar | 64 | region_register rr; |
65 | pta_register pta; |
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66 | int i; |
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1210 | vana | 67 | #ifdef CONFIG_VHPT |
1780 | jermar | 68 | uintptr_t vhpt_base; |
1210 | vana | 69 | #endif |
869 | vana | 70 | |
747 | jermar | 71 | /* |
72 | * First set up kernel region register. |
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901 | jermar | 73 | * This is redundant (see start.S) but we keep it here just for sure. |
747 | jermar | 74 | */ |
75 | rr.word = rr_read(VRN_KERNEL); |
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76 | rr.map.ve = 0; /* disable VHPT walker */ |
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77 | rr.map.ps = PAGE_WIDTH; |
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901 | jermar | 78 | rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL); |
747 | jermar | 79 | rr_write(VRN_KERNEL, rr.word); |
80 | srlz_i(); |
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81 | srlz_d(); |
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901 | jermar | 82 | |
747 | jermar | 83 | /* |
902 | jermar | 84 | * And setup the rest of region register. |
747 | jermar | 85 | */ |
86 | for(i = 0; i < REGION_REGISTERS; i++) { |
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87 | /* skip kernel rr */ |
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88 | if (i == VRN_KERNEL) |
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89 | continue; |
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728 | vana | 90 | |
904 | jermar | 91 | rr.word = rr_read(i); |
748 | jermar | 92 | rr.map.ve = 0; /* disable VHPT walker */ |
902 | jermar | 93 | rr.map.rid = RID_KERNEL; |
94 | rr.map.ps = PAGE_WIDTH; |
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747 | jermar | 95 | rr_write(i, rr.word); |
96 | srlz_i(); |
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97 | srlz_d(); |
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98 | } |
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726 | jermar | 99 | |
1210 | vana | 100 | #ifdef CONFIG_VHPT |
101 | vhpt_base = vhpt_set_up(); |
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102 | #endif |
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715 | vana | 103 | /* |
747 | jermar | 104 | * Set up PTA register. |
105 | */ |
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106 | pta.word = pta_read(); |
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1210 | vana | 107 | #ifndef CONFIG_VHPT |
747 | jermar | 108 | pta.map.ve = 0; /* disable VHPT walker */ |
1210 | vana | 109 | pta.map.base = 0 >> PTA_BASE_SHIFT; |
110 | #else |
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111 | pta.map.ve = 1; /* enable VHPT walker */ |
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112 | pta.map.base = vhpt_base >> PTA_BASE_SHIFT; |
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113 | #endif |
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747 | jermar | 114 | pta.map.vf = 1; /* large entry format */ |
115 | pta.map.size = VHPT_WIDTH; |
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116 | pta_write(pta.word); |
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117 | srlz_i(); |
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118 | srlz_d(); |
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119 | } |
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728 | vana | 120 | |
748 | jermar | 121 | /** Calculate address of collision chain from VPN and ASID. |
122 | * |
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749 | jermar | 123 | * Interrupts must be disabled. |
748 | jermar | 124 | * |
125 | * @param page Address of virtual page including VRN bits. |
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126 | * @param asid Address space identifier. |
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127 | * |
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792 | jermar | 128 | * @return VHPT entry address. |
748 | jermar | 129 | */ |
1780 | jermar | 130 | vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid) |
748 | jermar | 131 | { |
132 | region_register rr_save, rr; |
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749 | jermar | 133 | index_t vrn; |
134 | rid_t rid; |
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792 | jermar | 135 | vhpt_entry_t *v; |
748 | jermar | 136 | |
749 | jermar | 137 | vrn = page >> VRN_SHIFT; |
138 | rid = ASID2RID(asid, vrn); |
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139 | |||
140 | rr_save.word = rr_read(vrn); |
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141 | if (rr_save.map.rid == rid) { |
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142 | /* |
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143 | * The RID is already in place, compute thash and return. |
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144 | */ |
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792 | jermar | 145 | v = (vhpt_entry_t *) thash(page); |
146 | return v; |
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749 | jermar | 147 | } |
148 | |||
149 | /* |
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150 | * The RID must be written to some region register. |
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151 | * To speed things up, register indexed by vrn is used. |
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152 | */ |
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748 | jermar | 153 | rr.word = rr_save.word; |
749 | jermar | 154 | rr.map.rid = rid; |
155 | rr_write(vrn, rr.word); |
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748 | jermar | 156 | srlz_i(); |
792 | jermar | 157 | v = (vhpt_entry_t *) thash(page); |
749 | jermar | 158 | rr_write(vrn, rr_save.word); |
748 | jermar | 159 | srlz_i(); |
160 | srlz_d(); |
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161 | |||
792 | jermar | 162 | return v; |
748 | jermar | 163 | } |
749 | jermar | 164 | |
165 | /** Compare ASID and VPN against PTE. |
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166 | * |
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167 | * Interrupts must be disabled. |
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168 | * |
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169 | * @param page Address of virtual page including VRN bits. |
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170 | * @param asid Address space identifier. |
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171 | * |
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172 | * @return True if page and asid match the page and asid of t, false otherwise. |
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173 | */ |
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1780 | jermar | 174 | bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v) |
749 | jermar | 175 | { |
176 | region_register rr_save, rr; |
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177 | index_t vrn; |
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178 | rid_t rid; |
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179 | bool match; |
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180 | |||
792 | jermar | 181 | ASSERT(v); |
749 | jermar | 182 | |
183 | vrn = page >> VRN_SHIFT; |
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184 | rid = ASID2RID(asid, vrn); |
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185 | |||
186 | rr_save.word = rr_read(vrn); |
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187 | if (rr_save.map.rid == rid) { |
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188 | /* |
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189 | * The RID is already in place, compare ttag with t and return. |
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190 | */ |
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792 | jermar | 191 | return ttag(page) == v->present.tag.tag_word; |
749 | jermar | 192 | } |
193 | |||
194 | /* |
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195 | * The RID must be written to some region register. |
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196 | * To speed things up, register indexed by vrn is used. |
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197 | */ |
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198 | rr.word = rr_save.word; |
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199 | rr.map.rid = rid; |
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200 | rr_write(vrn, rr.word); |
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201 | srlz_i(); |
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792 | jermar | 202 | match = (ttag(page) == v->present.tag.tag_word); |
749 | jermar | 203 | rr_write(vrn, rr_save.word); |
204 | srlz_i(); |
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205 | srlz_d(); |
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206 | |||
207 | return match; |
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208 | } |
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209 | |||
210 | /** Set up one VHPT entry. |
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211 | * |
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1708 | jermar | 212 | * @param v VHPT entry to be set up. |
749 | jermar | 213 | * @param page Virtual address of the page mapped by the entry. |
214 | * @param asid Address space identifier of the address space to which page belongs. |
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215 | * @param frame Physical address of the frame to wich page is mapped. |
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216 | * @param flags Different flags for the mapping. |
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217 | */ |
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1780 | jermar | 218 | void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags) |
749 | jermar | 219 | { |
220 | region_register rr_save, rr; |
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221 | index_t vrn; |
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222 | rid_t rid; |
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1780 | jermar | 223 | uint64_t tag; |
749 | jermar | 224 | |
792 | jermar | 225 | ASSERT(v); |
749 | jermar | 226 | |
227 | vrn = page >> VRN_SHIFT; |
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228 | rid = ASID2RID(asid, vrn); |
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229 | |||
230 | /* |
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231 | * Compute ttag. |
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232 | */ |
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233 | rr_save.word = rr_read(vrn); |
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234 | rr.word = rr_save.word; |
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235 | rr.map.rid = rid; |
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236 | rr_write(vrn, rr.word); |
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237 | srlz_i(); |
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238 | tag = ttag(page); |
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239 | rr_write(vrn, rr_save.word); |
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240 | srlz_i(); |
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241 | srlz_d(); |
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242 | |||
243 | /* |
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244 | * Clear the entry. |
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245 | */ |
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792 | jermar | 246 | v->word[0] = 0; |
247 | v->word[1] = 0; |
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248 | v->word[2] = 0; |
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249 | v->word[3] = 0; |
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749 | jermar | 250 | |
792 | jermar | 251 | v->present.p = true; |
252 | v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE; |
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253 | v->present.a = false; /* not accessed */ |
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254 | v->present.d = false; /* not dirty */ |
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255 | v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL; |
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256 | v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ; |
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257 | v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0; |
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258 | v->present.ppn = frame >> PPN_SHIFT; |
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259 | v->present.ed = false; /* exception not deffered */ |
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260 | v->present.ps = PAGE_WIDTH; |
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261 | v->present.key = 0; |
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262 | v->present.tag.tag_word = tag; |
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749 | jermar | 263 | } |
1702 | cejka | 264 | |
1888 | jermar | 265 | /** @} |
1702 | cejka | 266 | */ |