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Rev | Author | Line No. | Line |
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684 | jermar | 1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
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747 | jermar | 3 | * Copyright (C) 2006 Jakub Vana |
684 | jermar | 4 | * All rights reserved. |
5 | * |
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6 | * Redistribution and use in source and binary forms, with or without |
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7 | * modification, are permitted provided that the following conditions |
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8 | * are met: |
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9 | * |
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10 | * - Redistributions of source code must retain the above copyright |
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11 | * notice, this list of conditions and the following disclaimer. |
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12 | * - Redistributions in binary form must reproduce the above copyright |
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13 | * notice, this list of conditions and the following disclaimer in the |
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14 | * documentation and/or other materials provided with the distribution. |
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15 | * - The name of the author may not be used to endorse or promote products |
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16 | * derived from this software without specific prior written permission. |
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17 | * |
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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28 | */ |
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29 | |||
30 | #include <arch/mm/page.h> |
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747 | jermar | 31 | #include <genarch/mm/page_ht.h> |
32 | #include <mm/asid.h> |
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749 | jermar | 33 | #include <arch/mm/asid.h> |
716 | vana | 34 | #include <arch/types.h> |
749 | jermar | 35 | #include <typedefs.h> |
728 | vana | 36 | #include <print.h> |
684 | jermar | 37 | #include <mm/page.h> |
747 | jermar | 38 | #include <mm/frame.h> |
684 | jermar | 39 | #include <config.h> |
40 | #include <panic.h> |
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746 | jermar | 41 | #include <arch/asm.h> |
747 | jermar | 42 | #include <arch/barrier.h> |
748 | jermar | 43 | #include <memstr.h> |
684 | jermar | 44 | |
792 | jermar | 45 | static void set_environment(void); |
749 | jermar | 46 | |
47 | /** Initialize ia64 virtual address translation subsystem. */ |
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48 | void page_arch_init(void) |
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49 | { |
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793 | jermar | 50 | page_mapping_operations = &ht_mapping_operations; |
749 | jermar | 51 | pk_disable(); |
792 | jermar | 52 | set_environment(); |
749 | jermar | 53 | } |
54 | |||
747 | jermar | 55 | /** Initialize VHPT and region registers. */ |
792 | jermar | 56 | void set_environment(void) |
716 | vana | 57 | { |
747 | jermar | 58 | region_register rr; |
59 | pta_register pta; |
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60 | int i; |
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869 | vana | 61 | |
747 | jermar | 62 | /* |
63 | * First set up kernel region register. |
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901 | jermar | 64 | * This is redundant (see start.S) but we keep it here just for sure. |
747 | jermar | 65 | */ |
66 | rr.word = rr_read(VRN_KERNEL); |
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67 | rr.map.ve = 0; /* disable VHPT walker */ |
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68 | rr.map.ps = PAGE_WIDTH; |
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901 | jermar | 69 | rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL); |
747 | jermar | 70 | rr_write(VRN_KERNEL, rr.word); |
71 | srlz_i(); |
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72 | srlz_d(); |
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901 | jermar | 73 | |
747 | jermar | 74 | /* |
75 | * And invalidate the rest of region register. |
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76 | */ |
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77 | for(i = 0; i < REGION_REGISTERS; i++) { |
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78 | /* skip kernel rr */ |
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79 | if (i == VRN_KERNEL) |
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80 | continue; |
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728 | vana | 81 | |
747 | jermar | 82 | rr.word == rr_read(i); |
748 | jermar | 83 | rr.map.ve = 0; /* disable VHPT walker */ |
901 | jermar | 84 | rr.map.rid = RID_INVALID; |
747 | jermar | 85 | rr_write(i, rr.word); |
86 | srlz_i(); |
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87 | srlz_d(); |
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88 | } |
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726 | jermar | 89 | |
715 | vana | 90 | /* |
747 | jermar | 91 | * Set up PTA register. |
92 | */ |
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93 | pta.word = pta_read(); |
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94 | pta.map.ve = 0; /* disable VHPT walker */ |
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95 | pta.map.vf = 1; /* large entry format */ |
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96 | pta.map.size = VHPT_WIDTH; |
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792 | jermar | 97 | pta.map.base = VHPT_BASE >> PTA_BASE_SHIFT; |
747 | jermar | 98 | pta_write(pta.word); |
99 | srlz_i(); |
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100 | srlz_d(); |
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101 | } |
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728 | vana | 102 | |
748 | jermar | 103 | /** Calculate address of collision chain from VPN and ASID. |
104 | * |
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749 | jermar | 105 | * Interrupts must be disabled. |
748 | jermar | 106 | * |
107 | * @param page Address of virtual page including VRN bits. |
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108 | * @param asid Address space identifier. |
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109 | * |
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792 | jermar | 110 | * @return VHPT entry address. |
748 | jermar | 111 | */ |
792 | jermar | 112 | vhpt_entry_t *vhpt_hash(__address page, asid_t asid) |
748 | jermar | 113 | { |
114 | region_register rr_save, rr; |
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749 | jermar | 115 | index_t vrn; |
116 | rid_t rid; |
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792 | jermar | 117 | vhpt_entry_t *v; |
748 | jermar | 118 | |
749 | jermar | 119 | vrn = page >> VRN_SHIFT; |
120 | rid = ASID2RID(asid, vrn); |
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121 | |||
122 | rr_save.word = rr_read(vrn); |
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123 | if (rr_save.map.rid == rid) { |
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124 | /* |
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125 | * The RID is already in place, compute thash and return. |
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126 | */ |
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792 | jermar | 127 | v = (vhpt_entry_t *) thash(page); |
128 | return v; |
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749 | jermar | 129 | } |
130 | |||
131 | /* |
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132 | * The RID must be written to some region register. |
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133 | * To speed things up, register indexed by vrn is used. |
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134 | */ |
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748 | jermar | 135 | rr.word = rr_save.word; |
749 | jermar | 136 | rr.map.rid = rid; |
137 | rr_write(vrn, rr.word); |
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748 | jermar | 138 | srlz_i(); |
792 | jermar | 139 | v = (vhpt_entry_t *) thash(page); |
749 | jermar | 140 | rr_write(vrn, rr_save.word); |
748 | jermar | 141 | srlz_i(); |
142 | srlz_d(); |
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143 | |||
792 | jermar | 144 | return v; |
748 | jermar | 145 | } |
749 | jermar | 146 | |
147 | /** Compare ASID and VPN against PTE. |
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148 | * |
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149 | * Interrupts must be disabled. |
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150 | * |
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151 | * @param page Address of virtual page including VRN bits. |
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152 | * @param asid Address space identifier. |
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153 | * |
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154 | * @return True if page and asid match the page and asid of t, false otherwise. |
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155 | */ |
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792 | jermar | 156 | bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v) |
749 | jermar | 157 | { |
158 | region_register rr_save, rr; |
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159 | index_t vrn; |
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160 | rid_t rid; |
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161 | bool match; |
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162 | |||
792 | jermar | 163 | ASSERT(v); |
749 | jermar | 164 | |
165 | vrn = page >> VRN_SHIFT; |
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166 | rid = ASID2RID(asid, vrn); |
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167 | |||
168 | rr_save.word = rr_read(vrn); |
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169 | if (rr_save.map.rid == rid) { |
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170 | /* |
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171 | * The RID is already in place, compare ttag with t and return. |
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172 | */ |
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792 | jermar | 173 | return ttag(page) == v->present.tag.tag_word; |
749 | jermar | 174 | } |
175 | |||
176 | /* |
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177 | * The RID must be written to some region register. |
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178 | * To speed things up, register indexed by vrn is used. |
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179 | */ |
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180 | rr.word = rr_save.word; |
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181 | rr.map.rid = rid; |
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182 | rr_write(vrn, rr.word); |
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183 | srlz_i(); |
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792 | jermar | 184 | match = (ttag(page) == v->present.tag.tag_word); |
749 | jermar | 185 | rr_write(vrn, rr_save.word); |
186 | srlz_i(); |
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187 | srlz_d(); |
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188 | |||
189 | return match; |
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190 | } |
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191 | |||
192 | /** Set up one VHPT entry. |
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193 | * |
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194 | * @param t VHPT entry to be set up. |
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195 | * @param page Virtual address of the page mapped by the entry. |
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196 | * @param asid Address space identifier of the address space to which page belongs. |
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197 | * @param frame Physical address of the frame to wich page is mapped. |
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198 | * @param flags Different flags for the mapping. |
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199 | */ |
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792 | jermar | 200 | void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags) |
749 | jermar | 201 | { |
202 | region_register rr_save, rr; |
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203 | index_t vrn; |
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204 | rid_t rid; |
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205 | __u64 tag; |
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206 | |||
792 | jermar | 207 | ASSERT(v); |
749 | jermar | 208 | |
209 | vrn = page >> VRN_SHIFT; |
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210 | rid = ASID2RID(asid, vrn); |
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211 | |||
212 | /* |
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213 | * Compute ttag. |
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214 | */ |
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215 | rr_save.word = rr_read(vrn); |
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216 | rr.word = rr_save.word; |
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217 | rr.map.rid = rid; |
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218 | rr_write(vrn, rr.word); |
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219 | srlz_i(); |
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220 | tag = ttag(page); |
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221 | rr_write(vrn, rr_save.word); |
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222 | srlz_i(); |
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223 | srlz_d(); |
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224 | |||
225 | /* |
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226 | * Clear the entry. |
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227 | */ |
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792 | jermar | 228 | v->word[0] = 0; |
229 | v->word[1] = 0; |
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230 | v->word[2] = 0; |
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231 | v->word[3] = 0; |
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749 | jermar | 232 | |
792 | jermar | 233 | v->present.p = true; |
234 | v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE; |
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235 | v->present.a = false; /* not accessed */ |
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236 | v->present.d = false; /* not dirty */ |
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237 | v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL; |
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238 | v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ; |
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239 | v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0; |
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240 | v->present.ppn = frame >> PPN_SHIFT; |
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241 | v->present.ed = false; /* exception not deffered */ |
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242 | v->present.ps = PAGE_WIDTH; |
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243 | v->present.key = 0; |
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244 | v->present.tag.tag_word = tag; |
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749 | jermar | 245 | } |