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| Rev | Author | Line No. | Line |
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| 435 | jermar | 1 | /* |
| 2071 | jermar | 2 | * Copyright (c) 2005 Jakub Jermar |
| 435 | jermar | 3 | * All rights reserved. |
| 4 | * |
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| 5 | * Redistribution and use in source and binary forms, with or without |
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| 6 | * modification, are permitted provided that the following conditions |
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| 7 | * are met: |
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| 8 | * |
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| 9 | * - Redistributions of source code must retain the above copyright |
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| 10 | * notice, this list of conditions and the following disclaimer. |
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| 11 | * - Redistributions in binary form must reproduce the above copyright |
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| 12 | * notice, this list of conditions and the following disclaimer in the |
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| 13 | * documentation and/or other materials provided with the distribution. |
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| 14 | * - The name of the author may not be used to endorse or promote products |
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| 15 | * derived from this software without specific prior written permission. |
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| 16 | * |
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 27 | */ |
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| 28 | |||
| 1881 | jermar | 29 | /** @addtogroup ia64 |
| 1702 | cejka | 30 | * @{ |
| 31 | */ |
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| 32 | /** @file |
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| 33 | */ |
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| 34 | |||
| 435 | jermar | 35 | /** Interval Timer driver. */ |
| 36 | |||
| 37 | #include <arch/drivers/it.h> |
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| 38 | #include <arch/interrupt.h> |
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| 39 | #include <arch/register.h> |
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| 40 | #include <arch/asm.h> |
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| 41 | #include <arch/barrier.h> |
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| 42 | #include <time/clock.h> |
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| 1942 | jermar | 43 | #include <ddi/irq.h> |
| 44 | #include <ddi/device.h> |
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| 1482 | vana | 45 | #include <arch.h> |
| 435 | jermar | 46 | |
| 1482 | vana | 47 | #define IT_SERVICE_CLOCKS 64 |
| 48 | |||
| 1942 | jermar | 49 | static irq_t it_irq; |
| 50 | |||
| 51 | static irq_ownership_t it_claim(void); |
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| 52 | static void it_interrupt(irq_t *irq, void *arg, ...); |
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| 53 | |||
| 435 | jermar | 54 | /** Initialize Interval Timer. */ |
| 55 | void it_init(void) |
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| 56 | { |
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| 57 | cr_itv_t itv; |
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| 3578 | vana | 58 | |
| 59 | if(config.cpu_active==1) |
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| 60 | { |
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| 61 | irq_initialize(&it_irq); |
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| 62 | it_irq.inr = INTERRUPT_TIMER; |
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| 63 | it_irq.devno = device_assign_devno(); |
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| 64 | it_irq.claim = it_claim; |
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| 65 | it_irq.handler = it_interrupt; |
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| 66 | irq_register(&it_irq); |
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| 67 | } |
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| 68 | |||
| 435 | jermar | 69 | /* initialize Interval Timer external interrupt vector */ |
| 70 | itv.value = itv_read(); |
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| 71 | itv.vector = INTERRUPT_TIMER; |
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| 72 | itv.m = 0; |
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| 73 | itv_write(itv.value); |
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| 74 | |||
| 75 | /* set Interval Timer Counter to zero */ |
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| 76 | itc_write(0); |
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| 77 | |||
| 78 | /* generate first Interval Timer interrupt in IT_DELTA ticks */ |
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| 79 | itm_write(IT_DELTA); |
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| 456 | jermar | 80 | |
| 81 | /* propagate changes */ |
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| 435 | jermar | 82 | srlz_d(); |
| 83 | } |
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| 84 | |||
| 1942 | jermar | 85 | /** Always claim ownership for this IRQ. |
| 86 | * |
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| 87 | * Other devices are responsible to avoid using INR 0. |
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| 88 | * |
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| 89 | * @return Always IRQ_ACCEPT. |
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| 90 | */ |
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| 91 | irq_ownership_t it_claim(void) |
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| 92 | { |
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| 93 | return IRQ_ACCEPT; |
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| 94 | } |
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| 1482 | vana | 95 | |
| 435 | jermar | 96 | /** Process Interval Timer interrupt. */ |
| 1942 | jermar | 97 | void it_interrupt(irq_t *irq, void *arg, ...) |
| 435 | jermar | 98 | { |
| 1780 | jermar | 99 | int64_t c; |
| 100 | int64_t m; |
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| 1482 | vana | 101 | |
| 435 | jermar | 102 | eoi_write(EOI); |
| 1482 | vana | 103 | |
| 1881 | jermar | 104 | m = itm_read(); |
| 1482 | vana | 105 | |
| 1881 | jermar | 106 | while (1) { |
| 107 | c = itc_read(); |
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| 108 | c += IT_SERVICE_CLOCKS; |
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| 1482 | vana | 109 | |
| 1881 | jermar | 110 | m += IT_DELTA; |
| 1942 | jermar | 111 | if (m - c < 0) |
| 1482 | vana | 112 | CPU->missed_clock_ticks++; |
| 1881 | jermar | 113 | else |
| 114 | break; |
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| 1482 | vana | 115 | } |
| 116 | |||
| 117 | itm_write(m); |
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| 456 | jermar | 118 | srlz_d(); /* propagate changes */ |
| 2107 | jermar | 119 | |
| 120 | /* |
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| 121 | * We are holding a lock which prevents preemption. |
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| 122 | * Release the lock, call clock() and reacquire the lock again. |
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| 123 | */ |
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| 124 | spinlock_unlock(&irq->lock); |
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| 435 | jermar | 125 | clock(); |
| 2107 | jermar | 126 | spinlock_lock(&irq->lock); |
| 435 | jermar | 127 | } |
| 1702 | cejka | 128 | |
| 1881 | jermar | 129 | /** @} |
| 1702 | cejka | 130 | */ |