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35 | jermar | 1 | /* |
747 | jermar | 2 | * Copyright (C) 2005 - 2006 Jakub Jermar |
3 | * Copyright (C) 2006 Jakub Vana |
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35 | jermar | 4 | * All rights reserved. |
5 | * |
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6 | * Redistribution and use in source and binary forms, with or without |
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7 | * modification, are permitted provided that the following conditions |
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8 | * are met: |
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9 | * |
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10 | * - Redistributions of source code must retain the above copyright |
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11 | * notice, this list of conditions and the following disclaimer. |
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12 | * - Redistributions in binary form must reproduce the above copyright |
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13 | * notice, this list of conditions and the following disclaimer in the |
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14 | * documentation and/or other materials provided with the distribution. |
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15 | * - The name of the author may not be used to endorse or promote products |
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16 | * derived from this software without specific prior written permission. |
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17 | * |
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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28 | */ |
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29 | |||
30 | #ifndef __ia64_PAGE_H__ |
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31 | #define __ia64_PAGE_H__ |
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32 | |||
747 | jermar | 33 | #include <arch/mm/frame.h> |
34 | #include <genarch/mm/page_ht.h> |
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749 | jermar | 35 | #include <arch/mm/asid.h> |
121 | jermar | 36 | #include <arch/types.h> |
747 | jermar | 37 | #include <typedefs.h> |
38 | #include <debug.h> |
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35 | jermar | 39 | |
40 | #define PAGE_SIZE FRAME_SIZE |
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715 | vana | 41 | #define PAGE_WIDTH FRAME_WIDTH |
35 | jermar | 42 | |
537 | jermar | 43 | #define KA2PA(x) ((__address) (x)) |
44 | #define PA2KA(x) ((__address) (x)) |
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35 | jermar | 45 | |
125 | jermar | 46 | #define GET_PTL0_ADDRESS_ARCH() ((pte_t *) 0) |
120 | jermar | 47 | #define SET_PTL0_ADDRESS_ARCH(ptl0) |
48 | |||
699 | jermar | 49 | /** Implementation of page hash table interface. */ |
749 | jermar | 50 | #define HT_ENTRIES_ARCH (VHPT_SIZE/sizeof(pte_t)) |
51 | #define HT_HASH_ARCH(page, asid) vhpt_hash((page), (asid)) |
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52 | #define HT_COMPARE_ARCH(page, asid, t) vhpt_compare((page), (asid), (t)) |
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53 | #define HT_SLOT_EMPTY_ARCH(t) ((t)->present.tag.tag_info.ti) |
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54 | #define HT_INVALIDATE_SLOT_ARCH(t) (t)->present.tag.tag_info.ti = true |
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55 | #define HT_GET_NEXT_ARCH(t) (t)->present.next |
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56 | #define HT_SET_NEXT_ARCH(t, s) (t)->present.next = (s) |
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57 | #define HT_SET_RECORD_ARCH(t, page, asid, frame, flags) vhpt_set_record(t, page, asid, frame, flags) |
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699 | jermar | 58 | |
749 | jermar | 59 | #define PPN_SHIFT 12 |
60 | |||
748 | jermar | 61 | #define VRN_SHIFT 61 |
62 | #define VRN_MASK (7LL << VRN_SHIFT) |
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63 | |||
747 | jermar | 64 | #define VRN_KERNEL 0 |
65 | #define REGION_REGISTERS 8 |
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715 | vana | 66 | |
747 | jermar | 67 | #define VHPT_WIDTH 20 /* 1M */ |
68 | #define VHPT_SIZE (1<<VHPT_WIDTH) |
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715 | vana | 69 | |
747 | jermar | 70 | #define VHPT_BASE page_ht /* Must be aligned to VHPT_SIZE */ |
715 | vana | 71 | |
749 | jermar | 72 | /** Memory Attributes. */ |
73 | #define MA_WRITEBACK 0x0 |
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74 | #define MA_UNCACHEABLE 0x4 |
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75 | |||
76 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
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77 | #define PL_KERNEL 0x0 |
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78 | #define PL_USER 0x3 |
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79 | |||
80 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
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81 | #define AR_READ 0x0 |
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82 | #define AR_EXECUTE 0x1 |
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83 | #define AR_WRITE 0x2 |
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84 | |||
747 | jermar | 85 | struct vhpt_tag_info { |
86 | unsigned long long tag : 63; |
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87 | unsigned ti : 1; |
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88 | } __attribute__ ((packed)); |
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710 | vana | 89 | |
747 | jermar | 90 | union vhpt_tag { |
91 | struct vhpt_tag_info tag_info; |
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92 | unsigned tag_word; |
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710 | vana | 93 | }; |
94 | |||
747 | jermar | 95 | struct vhpt_entry_present { |
710 | vana | 96 | /* Word 0 */ |
747 | jermar | 97 | unsigned p : 1; |
98 | unsigned : 1; |
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99 | unsigned ma : 3; |
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100 | unsigned a : 1; |
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101 | unsigned d : 1; |
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102 | unsigned pl : 2; |
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103 | unsigned ar : 3; |
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104 | unsigned long long ppn : 38; |
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105 | unsigned : 2; |
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106 | unsigned ed : 1; |
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107 | unsigned ig1 : 11; |
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710 | vana | 108 | |
109 | /* Word 1 */ |
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747 | jermar | 110 | unsigned : 2; |
111 | unsigned ps : 6; |
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112 | unsigned key : 24; |
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113 | unsigned : 32; |
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710 | vana | 114 | |
115 | /* Word 2 */ |
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747 | jermar | 116 | union vhpt_tag tag; |
117 | |||
710 | vana | 118 | /* Word 3 */ |
749 | jermar | 119 | pte_t *next; /**< Collision chain next pointer. */ |
747 | jermar | 120 | } __attribute__ ((packed)); |
710 | vana | 121 | |
747 | jermar | 122 | struct vhpt_entry_not_present { |
710 | vana | 123 | /* Word 0 */ |
747 | jermar | 124 | unsigned p : 1; |
125 | unsigned long long ig0 : 52; |
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126 | unsigned ig1 : 11; |
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710 | vana | 127 | |
128 | /* Word 1 */ |
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747 | jermar | 129 | unsigned : 2; |
130 | unsigned ps : 6; |
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131 | unsigned long long ig2 : 56; |
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710 | vana | 132 | |
747 | jermar | 133 | /* Word 2 */ |
134 | union vhpt_tag tag; |
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710 | vana | 135 | |
136 | /* Word 3 */ |
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749 | jermar | 137 | pte_t *next; /**< Collision chain next pointer. */ |
710 | vana | 138 | |
747 | jermar | 139 | } __attribute__ ((packed)); |
710 | vana | 140 | |
747 | jermar | 141 | typedef union vhpt_entry { |
142 | struct vhpt_entry_present present; |
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143 | struct vhpt_entry_not_present not_present; |
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749 | jermar | 144 | __u64 word[4]; |
747 | jermar | 145 | } vhpt_entry; |
710 | vana | 146 | |
747 | jermar | 147 | struct region_register_map { |
148 | unsigned ve : 1; |
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149 | unsigned : 1; |
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150 | unsigned ps : 6; |
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151 | unsigned rid : 24; |
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152 | unsigned : 32; |
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153 | } __attribute__ ((packed)); |
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684 | jermar | 154 | |
747 | jermar | 155 | typedef union region_register { |
156 | struct region_register_map map; |
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157 | unsigned long long word; |
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158 | } region_register; |
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715 | vana | 159 | |
747 | jermar | 160 | struct pta_register_map { |
161 | unsigned ve : 1; |
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162 | unsigned : 1; |
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163 | unsigned size : 6; |
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164 | unsigned vf : 1; |
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165 | unsigned : 6; |
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166 | unsigned long long base : 49; |
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167 | } __attribute__ ((packed)); |
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168 | |||
169 | typedef union pta_register { |
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170 | struct pta_register_map map; |
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171 | __u64 word; |
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172 | } pta_register; |
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173 | |||
174 | /** Return Translation Hashed Entry Address. |
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175 | * |
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176 | * VRN bits are used to read RID (ASID) from one |
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177 | * of the eight region registers registers. |
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178 | * |
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179 | * @param va Virtual address including VRN bits. |
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180 | * |
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181 | * @return Address of the head of VHPT collision chain. |
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182 | */ |
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183 | static inline __u64 thash(__u64 va) |
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715 | vana | 184 | { |
747 | jermar | 185 | __u64 ret; |
715 | vana | 186 | |
747 | jermar | 187 | __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
715 | vana | 188 | |
747 | jermar | 189 | return ret; |
190 | } |
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191 | |||
192 | /** Return Translation Hashed Entry Tag. |
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193 | * |
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194 | * VRN bits are used to read RID (ASID) from one |
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195 | * of the eight region registers. |
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196 | * |
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197 | * @param va Virtual address including VRN bits. |
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198 | * |
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199 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
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200 | */ |
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201 | static inline __u64 ttag(__u64 va) |
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715 | vana | 202 | { |
747 | jermar | 203 | __u64 ret; |
715 | vana | 204 | |
747 | jermar | 205 | __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
206 | |||
207 | return ret; |
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208 | } |
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209 | |||
210 | /** Read Region Register. |
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211 | * |
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212 | * @param i Region register index. |
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213 | * |
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214 | * @return Current contents of rr[i]. |
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215 | */ |
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216 | static inline __u64 rr_read(index_t i) |
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715 | vana | 217 | { |
747 | jermar | 218 | __u64 ret; |
219 | |||
748 | jermar | 220 | ASSERT(i < REGION_REGISTERS); |
747 | jermar | 221 | __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i)); |
222 | |||
223 | return ret; |
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224 | } |
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715 | vana | 225 | |
226 | |||
747 | jermar | 227 | /** Write Region Register. |
228 | * |
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229 | * @param i Region register index. |
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230 | * @param v Value to be written to rr[i]. |
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231 | */ |
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232 | static inline void rr_write(index_t i, __u64 v) |
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715 | vana | 233 | { |
748 | jermar | 234 | ASSERT(i < REGION_REGISTERS); |
747 | jermar | 235 | __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v)); |
236 | } |
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237 | |||
238 | /** Read Page Table Register. |
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239 | * |
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240 | * @return Current value stored in PTA. |
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241 | */ |
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242 | static inline __u64 pta_read(void) |
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243 | { |
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244 | __u64 ret; |
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245 | |||
246 | __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
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247 | |||
248 | return ret; |
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249 | } |
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715 | vana | 250 | |
747 | jermar | 251 | /** Write Page Table Register. |
252 | * |
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253 | * @param v New value to be stored in PTA. |
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254 | */ |
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255 | static inline void pta_write(__u64 v) |
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256 | { |
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257 | __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
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258 | } |
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715 | vana | 259 | |
747 | jermar | 260 | extern void page_arch_init(void); |
748 | jermar | 261 | extern pte_t *vhpt_hash(__address page, asid_t asid); |
749 | jermar | 262 | extern bool vhpt_compare(__address page, asid_t asid, pte_t *t); |
263 | extern void vhpt_set_record(pte_t *t, __address page, asid_t asid, __address frame, int flags); |
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747 | jermar | 264 | |
35 | jermar | 265 | #endif |