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35 | jermar | 1 | /* |
747 | jermar | 2 | * Copyright (C) 2005 - 2006 Jakub Jermar |
3 | * Copyright (C) 2006 Jakub Vana |
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35 | jermar | 4 | * All rights reserved. |
5 | * |
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6 | * Redistribution and use in source and binary forms, with or without |
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7 | * modification, are permitted provided that the following conditions |
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8 | * are met: |
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9 | * |
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10 | * - Redistributions of source code must retain the above copyright |
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11 | * notice, this list of conditions and the following disclaimer. |
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12 | * - Redistributions in binary form must reproduce the above copyright |
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13 | * notice, this list of conditions and the following disclaimer in the |
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14 | * documentation and/or other materials provided with the distribution. |
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15 | * - The name of the author may not be used to endorse or promote products |
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16 | * derived from this software without specific prior written permission. |
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17 | * |
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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28 | */ |
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29 | |||
30 | #ifndef __ia64_PAGE_H__ |
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31 | #define __ia64_PAGE_H__ |
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32 | |||
747 | jermar | 33 | #include <arch/mm/frame.h> |
34 | #include <genarch/mm/page_ht.h> |
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121 | jermar | 35 | #include <arch/types.h> |
747 | jermar | 36 | #include <typedefs.h> |
37 | #include <debug.h> |
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35 | jermar | 38 | |
39 | #define PAGE_SIZE FRAME_SIZE |
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715 | vana | 40 | #define PAGE_WIDTH FRAME_WIDTH |
35 | jermar | 41 | |
537 | jermar | 42 | #define KA2PA(x) ((__address) (x)) |
43 | #define PA2KA(x) ((__address) (x)) |
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35 | jermar | 44 | |
125 | jermar | 45 | #define GET_PTL0_ADDRESS_ARCH() ((pte_t *) 0) |
120 | jermar | 46 | #define SET_PTL0_ADDRESS_ARCH(ptl0) |
47 | |||
699 | jermar | 48 | /** Implementation of page hash table interface. */ |
746 | jermar | 49 | #define HT_ENTRIES_ARCH 0 |
699 | jermar | 50 | #define HT_HASH_ARCH(page, asid) 0 |
51 | #define HT_COMPARE_ARCH(page, asid, t) 0 |
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52 | #define HT_SLOT_EMPTY_ARCH(t) 1 |
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746 | jermar | 53 | #define HT_INVALIDATE_SLOT_ARCH(t) |
699 | jermar | 54 | #define HT_GET_NEXT_ARCH(t) 0 |
55 | #define HT_SET_NEXT_ARCH(t, s) |
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56 | #define HT_SET_RECORD_ARCH(t, page, asid, frame, flags) |
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57 | |||
747 | jermar | 58 | #define VRN_KERNEL 0 |
59 | #define REGION_REGISTERS 8 |
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715 | vana | 60 | |
747 | jermar | 61 | #define VHPT_WIDTH 20 /* 1M */ |
62 | #define VHPT_SIZE (1<<VHPT_WIDTH) |
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715 | vana | 63 | |
747 | jermar | 64 | #define VHPT_BASE page_ht /* Must be aligned to VHPT_SIZE */ |
715 | vana | 65 | |
747 | jermar | 66 | struct vhpt_tag_info { |
67 | unsigned long long tag : 63; |
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68 | unsigned ti : 1; |
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69 | } __attribute__ ((packed)); |
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710 | vana | 70 | |
747 | jermar | 71 | union vhpt_tag { |
72 | struct vhpt_tag_info tag_info; |
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73 | unsigned tag_word; |
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710 | vana | 74 | }; |
75 | |||
747 | jermar | 76 | struct vhpt_entry_present { |
710 | vana | 77 | /* Word 0 */ |
747 | jermar | 78 | unsigned p : 1; |
79 | unsigned : 1; |
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80 | unsigned ma : 3; |
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81 | unsigned a : 1; |
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82 | unsigned d : 1; |
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83 | unsigned pl : 2; |
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84 | unsigned ar : 3; |
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85 | unsigned long long ppn : 38; |
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86 | unsigned : 2; |
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87 | unsigned ed : 1; |
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88 | unsigned ig1 : 11; |
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710 | vana | 89 | |
90 | /* Word 1 */ |
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747 | jermar | 91 | unsigned : 2; |
92 | unsigned ps : 6; |
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93 | unsigned key : 24; |
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94 | unsigned : 32; |
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710 | vana | 95 | |
96 | /* Word 2 */ |
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747 | jermar | 97 | union vhpt_tag tag; |
98 | |||
710 | vana | 99 | /* Word 3 */ |
747 | jermar | 100 | unsigned long long next : 64; /**< Collision chain next pointer. */ |
101 | } __attribute__ ((packed)); |
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710 | vana | 102 | |
747 | jermar | 103 | struct vhpt_entry_not_present { |
710 | vana | 104 | /* Word 0 */ |
747 | jermar | 105 | unsigned p : 1; |
106 | unsigned long long ig0 : 52; |
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107 | unsigned ig1 : 11; |
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710 | vana | 108 | |
109 | /* Word 1 */ |
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747 | jermar | 110 | unsigned : 2; |
111 | unsigned ps : 6; |
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112 | unsigned long long ig2 : 56; |
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710 | vana | 113 | |
747 | jermar | 114 | /* Word 2 */ |
115 | union vhpt_tag tag; |
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710 | vana | 116 | |
117 | /* Word 3 */ |
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747 | jermar | 118 | unsigned long long next : 64; /**< Collision chain next pointer. */ |
710 | vana | 119 | |
747 | jermar | 120 | } __attribute__ ((packed)); |
710 | vana | 121 | |
747 | jermar | 122 | typedef union vhpt_entry { |
123 | struct vhpt_entry_present present; |
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124 | struct vhpt_entry_not_present not_present; |
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125 | } vhpt_entry; |
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710 | vana | 126 | |
747 | jermar | 127 | struct region_register_map { |
128 | unsigned ve : 1; |
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129 | unsigned : 1; |
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130 | unsigned ps : 6; |
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131 | unsigned rid : 24; |
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132 | unsigned : 32; |
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133 | } __attribute__ ((packed)); |
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684 | jermar | 134 | |
747 | jermar | 135 | typedef union region_register { |
136 | struct region_register_map map; |
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137 | unsigned long long word; |
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138 | } region_register; |
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715 | vana | 139 | |
747 | jermar | 140 | struct pta_register_map { |
141 | unsigned ve : 1; |
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142 | unsigned : 1; |
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143 | unsigned size : 6; |
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144 | unsigned vf : 1; |
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145 | unsigned : 6; |
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146 | unsigned long long base : 49; |
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147 | } __attribute__ ((packed)); |
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148 | |||
149 | typedef union pta_register { |
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150 | struct pta_register_map map; |
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151 | __u64 word; |
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152 | } pta_register; |
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153 | |||
154 | /** Return Translation Hashed Entry Address. |
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155 | * |
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156 | * VRN bits are used to read RID (ASID) from one |
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157 | * of the eight region registers registers. |
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158 | * |
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159 | * @param va Virtual address including VRN bits. |
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160 | * |
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161 | * @return Address of the head of VHPT collision chain. |
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162 | */ |
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163 | static inline __u64 thash(__u64 va) |
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715 | vana | 164 | { |
747 | jermar | 165 | __u64 ret; |
715 | vana | 166 | |
747 | jermar | 167 | __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
715 | vana | 168 | |
747 | jermar | 169 | return ret; |
170 | } |
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171 | |||
172 | /** Return Translation Hashed Entry Tag. |
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173 | * |
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174 | * VRN bits are used to read RID (ASID) from one |
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175 | * of the eight region registers. |
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176 | * |
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177 | * @param va Virtual address including VRN bits. |
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178 | * |
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179 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
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180 | */ |
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181 | static inline __u64 ttag(__u64 va) |
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715 | vana | 182 | { |
747 | jermar | 183 | __u64 ret; |
715 | vana | 184 | |
747 | jermar | 185 | __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
186 | |||
187 | return ret; |
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188 | } |
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189 | |||
190 | /** Read Region Register. |
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191 | * |
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192 | * @param i Region register index. |
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193 | * |
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194 | * @return Current contents of rr[i]. |
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195 | */ |
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196 | static inline __u64 rr_read(index_t i) |
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715 | vana | 197 | { |
747 | jermar | 198 | __u64 ret; |
199 | |||
200 | // ASSERT(i < REGION_REGISTERS); |
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201 | __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i)); |
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202 | |||
203 | return ret; |
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204 | } |
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715 | vana | 205 | |
206 | |||
747 | jermar | 207 | /** Write Region Register. |
208 | * |
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209 | * @param i Region register index. |
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210 | * @param v Value to be written to rr[i]. |
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211 | */ |
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212 | static inline void rr_write(index_t i, __u64 v) |
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715 | vana | 213 | { |
747 | jermar | 214 | // ASSERT(i < REGION_REGISTERS); |
215 | __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v)); |
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216 | } |
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217 | |||
218 | /** Read Page Table Register. |
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219 | * |
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220 | * @return Current value stored in PTA. |
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221 | */ |
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222 | static inline __u64 pta_read(void) |
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223 | { |
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224 | __u64 ret; |
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225 | |||
226 | __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
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227 | |||
228 | return ret; |
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229 | } |
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715 | vana | 230 | |
747 | jermar | 231 | /** Write Page Table Register. |
232 | * |
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233 | * @param v New value to be stored in PTA. |
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234 | */ |
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235 | static inline void pta_write(__u64 v) |
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236 | { |
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237 | __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v)); |
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238 | } |
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715 | vana | 239 | |
747 | jermar | 240 | extern void page_arch_init(void); |
241 | |||
35 | jermar | 242 | #endif |