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173 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2005 Jakub Jermar
173 jermar 3
 * All rights reserved.
4
 *
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 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
28
 
1888 jermar 29
/** @addtogroup ia64   
1702 cejka 30
 * @{
31
 */
32
/** @file
33
 */
34
 
1888 jermar 35
#ifndef KERN_ia64_ASM_H_
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#define KERN_ia64_ASM_H_
173 jermar 37
 
747 jermar 38
#include <config.h>
173 jermar 39
#include <arch/types.h>
432 jermar 40
#include <arch/register.h>
173 jermar 41
 
2726 vana 42
#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
2515 vana 43
 
3774 jermar 44
static inline void  outb(ioport_t port, uint8_t v)
2515 vana 45
{
3774 jermar 46
    *((uint8_t *)(IA64_IOSPACE_ADDRESS +
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        ((port & 0xfff) | ((port >> 2) << 12)))) = v;
2726 vana 48
 
2515 vana 49
    asm volatile ("mf\n" ::: "memory");
50
}
51
 
3774 jermar 52
static inline void  outw(ioport_t port, uint16_t v)
3490 vana 53
{
3774 jermar 54
    *((uint16_t *)(IA64_IOSPACE_ADDRESS +
55
        ((port & 0xfff) | ((port >> 2) << 12)))) = v;
2515 vana 56
 
3490 vana 57
    asm volatile ("mf\n" ::: "memory");
58
}
59
 
3774 jermar 60
static inline void  outl(ioport_t port, uint32_t v)
3490 vana 61
{
3774 jermar 62
    *((uint32_t *)(IA64_IOSPACE_ADDRESS +
63
        ((port & 0xfff) | ((port >> 2) << 12)))) = v;
3490 vana 64
 
65
    asm volatile ("mf\n" ::: "memory");
66
}
67
 
3577 vana 68
static inline uint8_t inb(ioport_t port)
2515 vana 69
{
70
    asm volatile ("mf\n" ::: "memory");
2726 vana 71
 
3774 jermar 72
    return *((uint8_t *)(IA64_IOSPACE_ADDRESS +
73
        ((port & 0xfff) | ((port >> 2) << 12))));
2515 vana 74
}
75
 
3577 vana 76
static inline uint16_t inw(ioport_t port)
3490 vana 77
{
78
    asm volatile ("mf\n" ::: "memory");
2515 vana 79
 
3774 jermar 80
    return *((uint16_t *)(IA64_IOSPACE_ADDRESS +
81
        ((port & 0xffE) | ((port >> 2) << 12))));
3490 vana 82
}
2515 vana 83
 
3577 vana 84
static inline uint32_t inl(ioport_t port)
3490 vana 85
{
86
    asm volatile ("mf\n" ::: "memory");
87
 
3774 jermar 88
    return *((uint32_t *)(IA64_IOSPACE_ADDRESS +
89
        ((port & 0xfff) | ((port >> 2) << 12))));
3490 vana 90
}
91
 
180 jermar 92
/** Return base address of current stack
93
 *
94
 * Return the base address of the current stack.
95
 * The stack is assumed to be STACK_SIZE long.
96
 * The stack must start on page boundary.
97
 */
1780 jermar 98
static inline uintptr_t get_stack_base(void)
173 jermar 99
{
1780 jermar 100
    uint64_t v;
180 jermar 101
 
3577 vana 102
    //I'm not sure why but this code bad inlines in scheduler, 
103
    //so THE shifts about 16B and causes kernel panic
104
    //asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
105
    //return v;
180 jermar 106
 
3577 vana 107
    //this code have the same meaning but inlines well
108
    asm volatile ("mov %0 = r12" : "=r" (v)  );
109
    return v & (~(STACK_SIZE-1));
173 jermar 110
}
111
 
919 jermar 112
/** Return Processor State Register.
113
 *
114
 * @return PSR.
115
 */
1780 jermar 116
static inline uint64_t psr_read(void)
919 jermar 117
{
1780 jermar 118
    uint64_t v;
919 jermar 119
 
2082 decky 120
    asm volatile ("mov %0 = psr\n" : "=r" (v));
919 jermar 121
 
122
    return v;
123
}
124
 
470 jermar 125
/** Read IVA (Interruption Vector Address).
126
 *
127
 * @return Return location of interruption vector table.
128
 */
1780 jermar 129
static inline uint64_t iva_read(void)
470 jermar 130
{
1780 jermar 131
    uint64_t v;
470 jermar 132
 
2082 decky 133
    asm volatile ("mov %0 = cr.iva\n" : "=r" (v));
470 jermar 134
 
135
    return v;
136
}
137
 
138
/** Write IVA (Interruption Vector Address) register.
139
 *
1708 jermar 140
 * @param v New location of interruption vector table.
470 jermar 141
 */
1780 jermar 142
static inline void iva_write(uint64_t v)
470 jermar 143
{
2082 decky 144
    asm volatile ("mov cr.iva = %0\n" : : "r" (v));
470 jermar 145
}
146
 
147
 
432 jermar 148
/** Read IVR (External Interrupt Vector Register).
431 jermar 149
 *
150
 * @return Highest priority, pending, unmasked external interrupt vector.
151
 */
1780 jermar 152
static inline uint64_t ivr_read(void)
431 jermar 153
{
1780 jermar 154
    uint64_t v;
431 jermar 155
 
2082 decky 156
    asm volatile ("mov %0 = cr.ivr\n" : "=r" (v));
431 jermar 157
 
432 jermar 158
    return v;
431 jermar 159
}
195 vana 160
 
3577 vana 161
static inline uint64_t cr64_read(void)
162
{
163
    uint64_t v;
164
 
165
    asm volatile ("mov %0 = cr64\n" : "=r" (v));
166
 
167
    return v;
168
}
169
 
170
 
432 jermar 171
/** Write ITC (Interval Timer Counter) register.
172
 *
1708 jermar 173
 * @param v New counter value.
432 jermar 174
 */
1780 jermar 175
static inline void itc_write(uint64_t v)
432 jermar 176
{
2082 decky 177
    asm volatile ("mov ar.itc = %0\n" : : "r" (v));
432 jermar 178
}
431 jermar 179
 
432 jermar 180
/** Read ITC (Interval Timer Counter) register.
181
 *
182
 * @return Current counter value.
183
 */
1780 jermar 184
static inline uint64_t itc_read(void)
432 jermar 185
{
1780 jermar 186
    uint64_t v;
432 jermar 187
 
2082 decky 188
    asm volatile ("mov %0 = ar.itc\n" : "=r" (v));
432 jermar 189
 
190
    return v;
191
}
195 vana 192
 
432 jermar 193
/** Write ITM (Interval Timer Match) register.
194
 *
1708 jermar 195
 * @param v New match value.
432 jermar 196
 */
1780 jermar 197
static inline void itm_write(uint64_t v)
432 jermar 198
{
2082 decky 199
    asm volatile ("mov cr.itm = %0\n" : : "r" (v));
432 jermar 200
}
195 vana 201
 
1488 vana 202
/** Read ITM (Interval Timer Match) register.
203
 *
204
 * @return Match value.
205
 */
1780 jermar 206
static inline uint64_t itm_read(void)
1488 vana 207
{
1780 jermar 208
    uint64_t v;
1488 vana 209
 
2082 decky 210
    asm volatile ("mov %0 = cr.itm\n" : "=r" (v));
1488 vana 211
 
212
    return v;
213
}
214
 
433 jermar 215
/** Read ITV (Interval Timer Vector) register.
216
 *
217
 * @return Current vector and mask bit.
218
 */
1780 jermar 219
static inline uint64_t itv_read(void)
433 jermar 220
{
1780 jermar 221
    uint64_t v;
433 jermar 222
 
2082 decky 223
    asm volatile ("mov %0 = cr.itv\n" : "=r" (v));
433 jermar 224
 
225
    return v;
226
}
227
 
432 jermar 228
/** Write ITV (Interval Timer Vector) register.
229
 *
1708 jermar 230
 * @param v New vector and mask bit.
432 jermar 231
 */
1780 jermar 232
static inline void itv_write(uint64_t v)
432 jermar 233
{
2082 decky 234
    asm volatile ("mov cr.itv = %0\n" : : "r" (v));
432 jermar 235
}
238 vana 236
 
432 jermar 237
/** Write EOI (End Of Interrupt) register.
238
 *
1708 jermar 239
 * @param v This value is ignored.
432 jermar 240
 */
1780 jermar 241
static inline void eoi_write(uint64_t v)
432 jermar 242
{
2082 decky 243
    asm volatile ("mov cr.eoi = %0\n" : : "r" (v));
432 jermar 244
}
245
 
246
/** Read TPR (Task Priority Register).
247
 *
248
 * @return Current value of TPR.
249
 */
1780 jermar 250
static inline uint64_t tpr_read(void)
432 jermar 251
{
1780 jermar 252
    uint64_t v;
432 jermar 253
 
2082 decky 254
    asm volatile ("mov %0 = cr.tpr\n"  : "=r" (v));
432 jermar 255
 
256
    return v;
257
}
258
 
259
/** Write TPR (Task Priority Register).
260
 *
1708 jermar 261
 * @param v New value of TPR.
432 jermar 262
 */
1780 jermar 263
static inline void tpr_write(uint64_t v)
432 jermar 264
{
2082 decky 265
    asm volatile ("mov cr.tpr = %0\n" : : "r" (v));
432 jermar 266
}
267
 
268
/** Disable interrupts.
269
 *
270
 * Disable interrupts and return previous
271
 * value of PSR.
272
 *
273
 * @return Old interrupt priority level.
274
 */
275
static ipl_t interrupts_disable(void)
276
{
1780 jermar 277
    uint64_t v;
432 jermar 278
 
2082 decky 279
    asm volatile (
432 jermar 280
        "mov %0 = psr\n"
281
        "rsm %1\n"
282
        : "=r" (v)
283
        : "i" (PSR_I_MASK)
284
    );
285
 
286
    return (ipl_t) v;
287
}
288
 
289
/** Enable interrupts.
290
 *
291
 * Enable interrupts and return previous
292
 * value of PSR.
293
 *
294
 * @return Old interrupt priority level.
295
 */
296
static ipl_t interrupts_enable(void)
297
{
1780 jermar 298
    uint64_t v;
432 jermar 299
 
2082 decky 300
    asm volatile (
432 jermar 301
        "mov %0 = psr\n"
302
        "ssm %1\n"
303
        ";;\n"
304
        "srlz.d\n"
305
        : "=r" (v)
306
        : "i" (PSR_I_MASK)
307
    );
308
 
309
    return (ipl_t) v;
310
}
311
 
312
/** Restore interrupt priority level.
313
 *
314
 * Restore PSR.
315
 *
316
 * @param ipl Saved interrupt priority level.
317
 */
318
static inline void interrupts_restore(ipl_t ipl)
319
{
472 jermar 320
    if (ipl & PSR_I_MASK)
321
        (void) interrupts_enable();
322
    else
323
        (void) interrupts_disable();
432 jermar 324
}
325
 
326
/** Return interrupt priority level.
327
 *
328
 * @return PSR.
329
 */
330
static inline ipl_t interrupts_read(void)
331
{
919 jermar 332
    return (ipl_t) psr_read();
432 jermar 333
}
334
 
746 jermar 335
/** Disable protection key checking. */
336
static inline void pk_disable(void)
337
{
2082 decky 338
    asm volatile ("rsm %0\n" : : "i" (PSR_PK_MASK));
746 jermar 339
}
340
 
432 jermar 341
extern void cpu_halt(void);
342
extern void cpu_sleep(void);
1780 jermar 343
extern void asm_delay_loop(uint32_t t);
238 vana 344
 
3774 jermar 345
extern void switch_to_userspace(uintptr_t, uintptr_t, uintptr_t, uintptr_t,
346
    uint64_t, uint64_t);
919 jermar 347
 
173 jermar 348
#endif
1702 cejka 349
 
1888 jermar 350
/** @}
1702 cejka 351
 */