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173 jermar 1
/*
2071 jermar 2
 * Copyright (c) 2005 Jakub Jermar
173 jermar 3
 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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/** @addtogroup ia64   
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 * @{
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 */
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/** @file
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 */
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#ifndef KERN_ia64_ASM_H_
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#define KERN_ia64_ASM_H_
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#include <config.h>
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#include <arch/types.h>
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#include <arch/register.h>
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2515 vana 42
 
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#define IA64_IOSPACE_ADDRESS 0xE0000FFFFC000000ULL
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static inline void  outb(uint64_t port,uint8_t v)
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{
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    *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
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    asm volatile ("mf\n" ::: "memory");
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}
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51
 
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static inline uint8_t inb(uint64_t port)
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{
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    asm volatile ("mf\n" ::: "memory");
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    return *((char *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 ))));
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}
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58
 
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/** Return base address of current stack
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 *
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 * Return the base address of the current stack.
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 * The stack is assumed to be STACK_SIZE long.
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 * The stack must start on page boundary.
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 */
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static inline uintptr_t get_stack_base(void)
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{
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    uint64_t v;
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2082 decky 70
    asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
180 jermar 71
 
72
    return v;
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}
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/** Return Processor State Register.
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 *
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 * @return PSR.
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 */
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static inline uint64_t psr_read(void)
919 jermar 80
{
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    uint64_t v;
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2082 decky 83
    asm volatile ("mov %0 = psr\n" : "=r" (v));
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85
    return v;
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}
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/** Read IVA (Interruption Vector Address).
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 *
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 * @return Return location of interruption vector table.
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 */
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static inline uint64_t iva_read(void)
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{
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    uint64_t v;
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2082 decky 96
    asm volatile ("mov %0 = cr.iva\n" : "=r" (v));
470 jermar 97
 
98
    return v;
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}
100
 
101
/** Write IVA (Interruption Vector Address) register.
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 *
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 * @param v New location of interruption vector table.
470 jermar 104
 */
1780 jermar 105
static inline void iva_write(uint64_t v)
470 jermar 106
{
2082 decky 107
    asm volatile ("mov cr.iva = %0\n" : : "r" (v));
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}
109
 
110
 
432 jermar 111
/** Read IVR (External Interrupt Vector Register).
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 *
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 * @return Highest priority, pending, unmasked external interrupt vector.
114
 */
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static inline uint64_t ivr_read(void)
431 jermar 116
{
1780 jermar 117
    uint64_t v;
431 jermar 118
 
2082 decky 119
    asm volatile ("mov %0 = cr.ivr\n" : "=r" (v));
431 jermar 120
 
432 jermar 121
    return v;
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}
195 vana 123
 
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/** Write ITC (Interval Timer Counter) register.
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 *
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 * @param v New counter value.
432 jermar 127
 */
1780 jermar 128
static inline void itc_write(uint64_t v)
432 jermar 129
{
2082 decky 130
    asm volatile ("mov ar.itc = %0\n" : : "r" (v));
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}
431 jermar 132
 
432 jermar 133
/** Read ITC (Interval Timer Counter) register.
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 *
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 * @return Current counter value.
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 */
1780 jermar 137
static inline uint64_t itc_read(void)
432 jermar 138
{
1780 jermar 139
    uint64_t v;
432 jermar 140
 
2082 decky 141
    asm volatile ("mov %0 = ar.itc\n" : "=r" (v));
432 jermar 142
 
143
    return v;
144
}
195 vana 145
 
432 jermar 146
/** Write ITM (Interval Timer Match) register.
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 *
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 * @param v New match value.
432 jermar 149
 */
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static inline void itm_write(uint64_t v)
432 jermar 151
{
2082 decky 152
    asm volatile ("mov cr.itm = %0\n" : : "r" (v));
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}
195 vana 154
 
1488 vana 155
/** Read ITM (Interval Timer Match) register.
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 *
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 * @return Match value.
158
 */
1780 jermar 159
static inline uint64_t itm_read(void)
1488 vana 160
{
1780 jermar 161
    uint64_t v;
1488 vana 162
 
2082 decky 163
    asm volatile ("mov %0 = cr.itm\n" : "=r" (v));
1488 vana 164
 
165
    return v;
166
}
167
 
433 jermar 168
/** Read ITV (Interval Timer Vector) register.
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 *
170
 * @return Current vector and mask bit.
171
 */
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static inline uint64_t itv_read(void)
433 jermar 173
{
1780 jermar 174
    uint64_t v;
433 jermar 175
 
2082 decky 176
    asm volatile ("mov %0 = cr.itv\n" : "=r" (v));
433 jermar 177
 
178
    return v;
179
}
180
 
432 jermar 181
/** Write ITV (Interval Timer Vector) register.
182
 *
1708 jermar 183
 * @param v New vector and mask bit.
432 jermar 184
 */
1780 jermar 185
static inline void itv_write(uint64_t v)
432 jermar 186
{
2082 decky 187
    asm volatile ("mov cr.itv = %0\n" : : "r" (v));
432 jermar 188
}
238 vana 189
 
432 jermar 190
/** Write EOI (End Of Interrupt) register.
191
 *
1708 jermar 192
 * @param v This value is ignored.
432 jermar 193
 */
1780 jermar 194
static inline void eoi_write(uint64_t v)
432 jermar 195
{
2082 decky 196
    asm volatile ("mov cr.eoi = %0\n" : : "r" (v));
432 jermar 197
}
198
 
199
/** Read TPR (Task Priority Register).
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 *
201
 * @return Current value of TPR.
202
 */
1780 jermar 203
static inline uint64_t tpr_read(void)
432 jermar 204
{
1780 jermar 205
    uint64_t v;
432 jermar 206
 
2082 decky 207
    asm volatile ("mov %0 = cr.tpr\n"  : "=r" (v));
432 jermar 208
 
209
    return v;
210
}
211
 
212
/** Write TPR (Task Priority Register).
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 *
1708 jermar 214
 * @param v New value of TPR.
432 jermar 215
 */
1780 jermar 216
static inline void tpr_write(uint64_t v)
432 jermar 217
{
2082 decky 218
    asm volatile ("mov cr.tpr = %0\n" : : "r" (v));
432 jermar 219
}
220
 
221
/** Disable interrupts.
222
 *
223
 * Disable interrupts and return previous
224
 * value of PSR.
225
 *
226
 * @return Old interrupt priority level.
227
 */
228
static ipl_t interrupts_disable(void)
229
{
1780 jermar 230
    uint64_t v;
432 jermar 231
 
2082 decky 232
    asm volatile (
432 jermar 233
        "mov %0 = psr\n"
234
        "rsm %1\n"
235
        : "=r" (v)
236
        : "i" (PSR_I_MASK)
237
    );
238
 
239
    return (ipl_t) v;
240
}
241
 
242
/** Enable interrupts.
243
 *
244
 * Enable interrupts and return previous
245
 * value of PSR.
246
 *
247
 * @return Old interrupt priority level.
248
 */
249
static ipl_t interrupts_enable(void)
250
{
1780 jermar 251
    uint64_t v;
432 jermar 252
 
2082 decky 253
    asm volatile (
432 jermar 254
        "mov %0 = psr\n"
255
        "ssm %1\n"
256
        ";;\n"
257
        "srlz.d\n"
258
        : "=r" (v)
259
        : "i" (PSR_I_MASK)
260
    );
261
 
262
    return (ipl_t) v;
263
}
264
 
265
/** Restore interrupt priority level.
266
 *
267
 * Restore PSR.
268
 *
269
 * @param ipl Saved interrupt priority level.
270
 */
271
static inline void interrupts_restore(ipl_t ipl)
272
{
472 jermar 273
    if (ipl & PSR_I_MASK)
274
        (void) interrupts_enable();
275
    else
276
        (void) interrupts_disable();
432 jermar 277
}
278
 
279
/** Return interrupt priority level.
280
 *
281
 * @return PSR.
282
 */
283
static inline ipl_t interrupts_read(void)
284
{
919 jermar 285
    return (ipl_t) psr_read();
432 jermar 286
}
287
 
746 jermar 288
/** Disable protection key checking. */
289
static inline void pk_disable(void)
290
{
2082 decky 291
    asm volatile ("rsm %0\n" : : "i" (PSR_PK_MASK));
746 jermar 292
}
293
 
432 jermar 294
extern void cpu_halt(void);
295
extern void cpu_sleep(void);
1780 jermar 296
extern void asm_delay_loop(uint32_t t);
238 vana 297
 
1780 jermar 298
extern void switch_to_userspace(uintptr_t entry, uintptr_t sp, uintptr_t bsp, uintptr_t uspace_uarg, uint64_t ipsr, uint64_t rsc);
919 jermar 299
 
173 jermar 300
#endif
1702 cejka 301
 
1888 jermar 302
/** @}
1702 cejka 303
 */