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1 | jermar | 1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #ifndef __APIC_H__ |
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30 | #define __APIC_H__ |
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31 | |||
32 | #include <arch/types.h> |
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33 | #include <cpu.h> |
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34 | |||
35 | #define FIXED (0<<0) |
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36 | #define LOPRI (1<<0) |
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37 | |||
38 | /* local APIC macros */ |
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39 | #define IPI_INIT 0 |
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40 | #define IPI_STARTUP 0 |
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41 | |||
5 | jermar | 42 | #define DLVRMODE_FIXED (0<<8) |
1 | jermar | 43 | #define DLVRMODE_INIT (5<<8) |
44 | #define DLVRMODE_STUP (6<<8) |
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45 | #define DESTMODE_PHYS (0<<11) |
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46 | #define DESTMODE_LOGIC (1<<11) |
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47 | #define LEVEL_ASSERT (1<<14) |
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48 | #define LEVEL_DEASSERT (0<<14) |
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49 | #define TRGRMODE_LEVEL (1<<15) |
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50 | #define TRGRMODE_EDGE (0<<15) |
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51 | #define SHORTHAND_DEST (0<<18) |
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52 | #define SHORTHAND_INCL (2<<18) |
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53 | #define SHORTHAND_EXCL (3<<18) |
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54 | |||
55 | #define SEND_PENDING (1<<12) |
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56 | |||
57 | /* Interrupt Command Register */ |
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58 | #define ICRlo (0x300/sizeof(__u32)) |
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59 | #define ICRhi (0x310/sizeof(__u32)) |
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5 | jermar | 60 | #define ICRloClear ((1<<13)|(3<<16)|(0xfff<<20)) |
1 | jermar | 61 | #define ICRhiClear (0xffffff<<0) |
62 | |||
63 | /* End Of Interrupt */ |
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64 | #define EOI (0x0b0/sizeof(__u32)) |
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65 | |||
66 | /* Error Status Register */ |
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67 | #define ESR (0x280/sizeof(__u32)) |
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68 | #define ESRClear ((0xffffff<<8)|(1<<4)) |
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69 | |||
70 | /* Task Priority Register */ |
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71 | #define TPR (0x080/sizeof(__u32)) |
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72 | #define TPRClear 0xffffff00 |
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73 | |||
74 | /* Spurious Vector Register */ |
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75 | #define SVR (0x0f0/sizeof(__u32)) |
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76 | #define SVRClear (~0x3f0) |
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77 | |||
78 | /* Time Divide Configuratio Register */ |
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79 | #define TDCR (0x3e0/sizeof(__u32)) |
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80 | #define TDCRClear (~0xb) |
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81 | |||
82 | /* Initial Count Register for Timer */ |
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83 | #define ICRT (0x380/sizeof(__u32)) |
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84 | |||
85 | /* Current Count Register for Timer */ |
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86 | #define CCRT (0x390/sizeof(__u32)) |
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87 | |||
88 | /* LVT */ |
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89 | #define LVT_Tm (0x320/sizeof(__u32)) |
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90 | #define LVT_LINT0 (0x350/sizeof(__u32)) |
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91 | #define LVT_LINT1 (0x360/sizeof(__u32)) |
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92 | #define LVT_Err (0x370/sizeof(__u32)) |
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93 | #define LVT_PCINT (0x340/sizeof(__u32)) |
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94 | |||
95 | /* Local APIC ID Register */ |
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96 | #define L_APIC_ID (0x020/sizeof(__u32)) |
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97 | #define L_APIC_IDClear (~(0xf<<24)) |
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16 | jermar | 98 | #define L_APIC_IDShift 24 |
99 | #define L_APIC_IDMask 0xf |
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1 | jermar | 100 | |
27 | jermar | 101 | /* Local APIC Version Register */ |
102 | #define LAVR (0x030/sizeof(__u32)) |
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103 | #define LAVR_Mask 0xff |
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104 | #define is_local_apic(x) (((x)&LAVR_Mask&0xf0)==0x1) |
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105 | #define is_82489DX_apic(x) ((((x)&LAVR_Mask&0xf0)==0x0)) |
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106 | #define is_local_xapic(x) (((x)&LAVR_Mask)==0x14) |
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107 | |||
1 | jermar | 108 | /* IO APIC */ |
109 | #define IOREGSEL (0x00/sizeof(__u32)) |
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110 | #define IOWIN (0x10/sizeof(__u32)) |
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111 | |||
112 | #define IOAPICID 0x00 |
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113 | #define IOAPICVER 0x01 |
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114 | #define IOAPICARB 0x02 |
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115 | #define IOREDTBL 0x10 |
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116 | |||
117 | |||
118 | extern volatile __u32 *l_apic; |
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119 | extern volatile __u32 *io_apic; |
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120 | |||
121 | extern __u32 apic_id_mask; |
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122 | |||
123 | extern void apic_init(void); |
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268 | palkovsky | 124 | extern void apic_spurious(__u8 n, __native stack[]); |
1 | jermar | 125 | |
126 | extern void l_apic_init(void); |
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127 | extern void l_apic_eoi(void); |
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5 | jermar | 128 | extern int l_apic_broadcast_custom_ipi(__u8 vector); |
1 | jermar | 129 | extern int l_apic_send_init_ipi(__u8 apicid); |
130 | extern void l_apic_debug(void); |
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268 | palkovsky | 131 | extern void l_apic_timer_interrupt(__u8 n, __native stack[]); |
81 | jermar | 132 | extern __u8 l_apic_id(void); |
1 | jermar | 133 | |
134 | extern __u32 io_apic_read(__u8 address); |
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135 | extern void io_apic_write(__u8 address , __u32 x); |
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136 | extern void io_apic_change_ioredtbl(int signal, int dest, __u8 v, int flags); |
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137 | extern void io_apic_disable_irqs(__u16 irqmask); |
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138 | extern void io_apic_enable_irqs(__u16 irqmask); |
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139 | |||
140 | #endif |