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1 jermar 1
/*
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 * Copyright (C) 2001-2004 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#ifndef __APIC_H__
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#define __APIC_H__
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#include <arch/types.h>
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#include <cpu.h>
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#define FIXED       (0<<0)
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#define LOPRI       (1<<0)
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/* local APIC macros */
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#define IPI_INIT    0
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#define IPI_STARTUP 0
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#define DLVRMODE_FIXED  (0<<8)
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#define DLVRMODE_INIT   (5<<8)
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#define DLVRMODE_STUP   (6<<8)
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#define DESTMODE_PHYS   (0<<11)
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#define DESTMODE_LOGIC  (1<<11)
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#define LEVEL_ASSERT    (1<<14)
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#define LEVEL_DEASSERT  (0<<14)
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#define TRGRMODE_LEVEL  (1<<15)
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#define TRGRMODE_EDGE   (0<<15)
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#define SHORTHAND_DEST  (0<<18)
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#define SHORTHAND_INCL  (2<<18)
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#define SHORTHAND_EXCL  (3<<18)
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#define SEND_PENDING    (1<<12)
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/* Interrupt Command Register */
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#define ICRlo       (0x300/sizeof(__u32))
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#define ICRhi       (0x310/sizeof(__u32))
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#define ICRloClear  ((1<<13)|(3<<16)|(0xfff<<20))
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#define ICRhiClear  (0xffffff<<0)
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/* End Of Interrupt */
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#define EOI     (0x0b0/sizeof(__u32))
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/* Error Status Register */
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#define ESR     (0x280/sizeof(__u32))
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#define ESRClear    ((0xffffff<<8)|(1<<4))
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/* Task Priority Register */
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#define TPR     (0x080/sizeof(__u32))
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#define TPRClear    0xffffff00
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/* Spurious Vector Register */
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#define SVR     (0x0f0/sizeof(__u32))
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#define SVRClear    (~0x3f0)
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/* Time Divide Configuratio Register */
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#define TDCR        (0x3e0/sizeof(__u32))
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#define TDCRClear   (~0xb)
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/* Initial Count Register for Timer */
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#define ICRT        (0x380/sizeof(__u32))
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/* Current Count Register for Timer */
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#define CCRT        (0x390/sizeof(__u32))
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/* LVT */
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#define LVT_Tm      (0x320/sizeof(__u32))
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#define LVT_LINT0   (0x350/sizeof(__u32))
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#define LVT_LINT1   (0x360/sizeof(__u32))
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#define LVT_Err     (0x370/sizeof(__u32))
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#define LVT_PCINT   (0x340/sizeof(__u32))
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/* Local APIC ID Register */
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#define L_APIC_ID   (0x020/sizeof(__u32))
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#define L_APIC_IDClear  (~(0xf<<24))
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#define L_APIC_IDShift  24
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#define L_APIC_IDMask   0xf
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/* Local APIC Version Register */
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#define LAVR        (0x030/sizeof(__u32))
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#define LAVR_Mask   0xff
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#define is_local_apic(x)    (((x)&LAVR_Mask&0xf0)==0x1)
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#define is_82489DX_apic(x)  ((((x)&LAVR_Mask&0xf0)==0x0))
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#define is_local_xapic(x)   (((x)&LAVR_Mask)==0x14)
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/* IO APIC */
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#define IOREGSEL    (0x00/sizeof(__u32))
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#define IOWIN       (0x10/sizeof(__u32))
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#define IOAPICID    0x00
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#define IOAPICVER   0x01
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#define IOAPICARB   0x02
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#define IOREDTBL    0x10
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extern volatile __u32 *l_apic;
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extern volatile __u32 *io_apic;
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extern __u32 apic_id_mask;
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extern void apic_init(void);
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extern void apic_spurious(__u8 n, __native stack[]);
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extern void l_apic_init(void);
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extern void l_apic_eoi(void);
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extern int l_apic_broadcast_custom_ipi(__u8 vector);
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extern int l_apic_send_init_ipi(__u8 apicid);
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extern void l_apic_debug(void);
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extern void l_apic_timer_interrupt(__u8 n, __native stack[]);
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extern __u8 l_apic_id(void);
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extern __u32 io_apic_read(__u8 address);
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extern void io_apic_write(__u8 address , __u32 x);
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extern void io_apic_change_ioredtbl(int signal, int dest, __u8 v, int flags);
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extern void io_apic_disable_irqs(__u16 irqmask);
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extern void io_apic_enable_irqs(__u16 irqmask);
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#endif