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226 | palkovsky | 1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #include <arch/interrupt.h> |
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30 | #include <print.h> |
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31 | #include <debug.h> |
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32 | #include <panic.h> |
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33 | #include <arch/i8259.h> |
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34 | #include <func.h> |
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35 | #include <cpu.h> |
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36 | #include <arch/asm.h> |
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37 | #include <mm/tlb.h> |
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38 | #include <arch.h> |
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39 | |||
40 | /* |
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41 | * Interrupt and exception dispatching. |
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42 | */ |
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43 | |||
44 | static iroutine ivt[IVT_ITEMS]; |
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45 | |||
46 | void (* disable_irqs_function)(__u16 irqmask) = NULL; |
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47 | void (* enable_irqs_function)(__u16 irqmask) = NULL; |
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48 | void (* eoi_function)(void) = NULL; |
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49 | |||
50 | iroutine trap_register(__u8 n, iroutine f) |
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51 | { |
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52 | ASSERT(n < IVT_ITEMS); |
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53 | |||
54 | iroutine old; |
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55 | |||
56 | old = ivt[n]; |
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57 | ivt[n] = f; |
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58 | |||
59 | return old; |
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60 | } |
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61 | |||
62 | /* |
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63 | * Called directly from the assembler code. |
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64 | * CPU is cpu_priority_high(). |
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65 | */ |
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66 | void trap_dispatcher(__u8 n, __native stack[]) |
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67 | { |
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68 | ASSERT(n < IVT_ITEMS); |
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69 | |||
70 | ivt[n](n, stack); |
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71 | } |
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72 | |||
73 | void null_interrupt(__u8 n, __native stack[]) |
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74 | { |
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75 | printf("int %d: null_interrupt\n", n); |
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76 | printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]); |
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77 | panic("unserviced interrupt\n"); |
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78 | } |
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79 | |||
80 | void gp_fault(__u8 n, __native stack[]) |
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81 | { |
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82 | printf("ERROR_WORD=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]); |
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83 | printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack); |
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84 | printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]); |
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85 | panic("general protection fault\n"); |
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86 | } |
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87 | |||
88 | void ss_fault(__u8 n, __native stack[]) |
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89 | { |
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90 | printf("ERROR_WORD=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]); |
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91 | printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack); |
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92 | printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]); |
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93 | panic("stack fault\n"); |
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94 | } |
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95 | |||
96 | |||
97 | void nm_fault(__u8 n, __native stack[]) |
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98 | { |
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99 | reset_TS_flag(); |
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100 | if ((CPU->fpu_owner)!=NULL) { |
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101 | fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context)); |
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102 | (CPU->fpu_owner)->fpu_context_engaged=0; /* don't prevent migration */ |
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103 | } |
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104 | if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context)); |
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105 | else {fpu_init();THREAD->fpu_context_exists=1;} |
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106 | CPU->fpu_owner=THREAD; |
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107 | } |
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108 | |||
109 | |||
110 | |||
111 | void page_fault(__u8 n, __native stack[]) |
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112 | { |
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113 | printf("page fault address: %Q\n", read_cr2()); |
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114 | printf("ERROR_WORD=%Q, %%rip=%Q, %%rcs=%Q, flags=%Q\n", stack[0], stack[1], stack[2], stack[3]); |
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115 | printf("%%rax=%Q, %%rbx=%Q, %%rcx=%Q, %%rdx=%Q,\n%%rsi=%Q, %%rdi=%Q\n", |
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116 | stack[-1], stack[-2], stack[-3], stack[-4], stack[-5], stack[-6]); |
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117 | |||
118 | printf("stack: %X, %X, %X, %X\n", stack[5], stack[6], stack[7], stack[8]); |
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119 | panic("page fault\n"); |
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120 | } |
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121 | |||
122 | void syscall(__u8 n, __native stack[]) |
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123 | { |
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124 | printf("cpu%d: syscall\n", CPU->id); |
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125 | thread_usleep(1000); |
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126 | } |
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127 | |||
128 | void tlb_shootdown_ipi(__u8 n, __native stack[]) |
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129 | { |
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130 | trap_virtual_eoi(); |
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131 | tlb_shootdown_ipi_recv(); |
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132 | } |
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133 | |||
134 | void wakeup_ipi(__u8 n, __native stack[]) |
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135 | { |
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136 | trap_virtual_eoi(); |
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137 | } |
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138 | |||
139 | void trap_virtual_enable_irqs(__u16 irqmask) |
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140 | { |
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141 | if (enable_irqs_function) |
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142 | enable_irqs_function(irqmask); |
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143 | else |
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144 | panic("no enable_irqs_function\n"); |
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145 | } |
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146 | |||
147 | void trap_virtual_disable_irqs(__u16 irqmask) |
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148 | { |
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149 | if (disable_irqs_function) |
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150 | disable_irqs_function(irqmask); |
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151 | else |
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152 | panic("no disable_irqs_function\n"); |
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153 | } |
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154 | |||
155 | void trap_virtual_eoi(void) |
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156 | { |
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157 | if (eoi_function) |
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158 | eoi_function(); |
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159 | else |
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160 | panic("no eoi_function\n"); |
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161 | |||
162 | } |