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173 jermar 1 
/*
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 *
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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#ifndef __amd64_ASM_H__
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#define __amd64_ASM_H__
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#include <arch/types.h>
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#include <config.h>
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void asm_delay_loop(__u32 t);
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void asm_fake_loop(__u32 t);
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static inline __address get_stack_base(void)
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{
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    __address v;
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    __asm__ volatile ("andq %%rsp, %0\n" : "=r" (v) : "0" (~((__u64)STACK_SIZE-1)));
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    return v;
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}
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static inline void cpu_sleep(void) { __asm__("hlt"); };
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static inline void cpu_halt(void) { __asm__("hlt"); };
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static inline __u8 inb(__u16 port)
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{
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    __u8 out;
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    asm (
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        "mov %1, %%dx;"
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        "inb %%dx,%%al;"
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        "mov %%al, %0;"
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        :"=m"(out)
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        :"m"(port)
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        :"%dx","%al"
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        );
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    return out;
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}
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static inline __u8 outb(__u16 port,__u8 b)
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{
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    asm (
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        "mov %0,%%dx;"
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        "mov %1,%%al;"
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        "outb %%al,%%dx;"
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        :
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        :"m"( port), "m" (b)
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        :"%dx","%al"
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        );
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}
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/** Set priority level low
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 *
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 * Enable interrupts and return previous
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 * value of EFLAGS.
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 */
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static inline pri_t cpu_priority_low(void) {
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    pri_t v;
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    __asm__ volatile (
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        "pushfq\n"
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        "popq %0\n"
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        "sti\n"
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        : "=r" (v)
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    );
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    return v;
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}
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/** Set priority level high
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 *
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 * Disable interrupts and return previous
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 * value of EFLAGS.
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 */
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static inline pri_t cpu_priority_high(void) {
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    pri_t v;
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    __asm__ volatile (
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        "pushfq\n"
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        "popq %0\n"
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        "cli\n"
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        : "=r" (v)
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        );
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    return v;
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}
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/** Restore priority level
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 *
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 * Restore EFLAGS.
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 */
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static inline void cpu_priority_restore(pri_t pri) {
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    __asm__ volatile (
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        "pushq %0\n"
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        "popfq\n"
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        : : "r" (pri)
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        );
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}
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/** Return raw priority level
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 *
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 * Return EFLAFS.
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 */
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static inline pri_t cpu_priority_read(void) {
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    pri_t v;
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    __asm__ volatile (
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        "pushfq\n"
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        "popq %0\n"
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        : "=r" (v)
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    );
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    return v;
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}
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/** Read CR2
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 *
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 * Return value in CR2
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 *
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 * @return Value read.
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 */
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static inline __u64 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; }
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/** Write CR3
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 *
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 * Write value to CR3.
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 *
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 * @param v Value to be written.
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 */
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static inline void write_cr3(__u64 v) { __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); }
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/** Read CR3
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 *
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 * Return value in CR3
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 *
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 * @return Value read.
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 */
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static inline __u64 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; }
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extern size_t interrupt_handler_size;
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extern void interrupt_handlers(void);
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#endif