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1281 | palkovsky | 1 | /* |
2 | * Copyright (C) 2006 Ondrej Palkovsky |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
1284 | palkovsky | 29 | /** IRQ notification framework |
30 | * |
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31 | * This framework allows applications to register to receive a notification |
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32 | * when interrupt is detected. The application may provide a simple 'top-half' |
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33 | * handler as part of its registration, which can perform simple operations |
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34 | * (read/write port/memory, add information to notification ipc message). |
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35 | * |
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36 | * The structure of a notification message is as follows: |
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1693 | palkovsky | 37 | * - METHOD: interrupt number |
38 | * - ARG1: payload modified by a 'top-half' handler |
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39 | * - ARG2: payload |
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40 | * - ARG3: payload |
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41 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
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1284 | palkovsky | 42 | * in multithreaded drivers) |
43 | */ |
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44 | |||
1281 | palkovsky | 45 | #include <arch.h> |
46 | #include <mm/slab.h> |
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47 | #include <errno.h> |
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48 | #include <ipc/ipc.h> |
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49 | #include <ipc/irq.h> |
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1284 | palkovsky | 50 | #include <atomic.h> |
1288 | jermar | 51 | #include <syscall/copy.h> |
1507 | vana | 52 | #include <console/console.h> |
1281 | palkovsky | 53 | |
54 | typedef struct { |
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55 | SPINLOCK_DECLARE(lock); |
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56 | answerbox_t *box; |
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57 | irq_code_t *code; |
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1284 | palkovsky | 58 | atomic_t counter; |
1281 | palkovsky | 59 | } ipc_irq_t; |
60 | |||
61 | |||
62 | static ipc_irq_t *irq_conns = NULL; |
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63 | static int irq_conns_size; |
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64 | |||
65 | #include <print.h> |
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66 | /* Execute code associated with IRQ notification */ |
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67 | static void code_execute(call_t *call, irq_code_t *code) |
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68 | { |
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69 | int i; |
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1693 | palkovsky | 70 | __native dstval = 0; |
1628 | decky | 71 | |
1281 | palkovsky | 72 | if (!code) |
73 | return; |
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74 | |||
75 | for (i=0; i < code->cmdcount;i++) { |
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76 | switch (code->cmds[i].cmd) { |
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77 | case CMD_MEM_READ_1: |
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1693 | palkovsky | 78 | dstval = *((__u8 *)code->cmds[i].addr); |
1281 | palkovsky | 79 | break; |
80 | case CMD_MEM_READ_2: |
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1693 | palkovsky | 81 | dstval = *((__u16 *)code->cmds[i].addr); |
1281 | palkovsky | 82 | break; |
83 | case CMD_MEM_READ_4: |
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1693 | palkovsky | 84 | dstval = *((__u32 *)code->cmds[i].addr); |
1281 | palkovsky | 85 | break; |
86 | case CMD_MEM_READ_8: |
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1693 | palkovsky | 87 | dstval = *((__u64 *)code->cmds[i].addr); |
1281 | palkovsky | 88 | break; |
89 | case CMD_MEM_WRITE_1: |
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90 | *((__u8 *)code->cmds[i].addr) = code->cmds[i].value; |
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91 | break; |
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92 | case CMD_MEM_WRITE_2: |
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93 | *((__u16 *)code->cmds[i].addr) = code->cmds[i].value; |
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94 | break; |
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95 | case CMD_MEM_WRITE_4: |
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96 | *((__u32 *)code->cmds[i].addr) = code->cmds[i].value; |
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97 | break; |
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98 | case CMD_MEM_WRITE_8: |
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99 | *((__u64 *)code->cmds[i].addr) = code->cmds[i].value; |
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100 | break; |
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1284 | palkovsky | 101 | #if defined(ia32) || defined(amd64) |
102 | case CMD_PORT_READ_1: |
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1693 | palkovsky | 103 | dstval = inb((long)code->cmds[i].addr); |
1284 | palkovsky | 104 | break; |
105 | case CMD_PORT_WRITE_1: |
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106 | outb((long)code->cmds[i].addr, code->cmds[i].value); |
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107 | break; |
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108 | #endif |
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1507 | vana | 109 | #if defined(ia64) |
110 | case CMD_IA64_GETCHAR: |
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1693 | palkovsky | 111 | dstval = _getc(&ski_uconsole); |
1507 | vana | 112 | break; |
113 | #endif |
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1628 | decky | 114 | #if defined(ppc32) |
1625 | decky | 115 | case CMD_PPC32_GETCHAR: |
1693 | palkovsky | 116 | dstval = cuda_get_scancode(); |
1625 | decky | 117 | break; |
118 | #endif |
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1281 | palkovsky | 119 | default: |
120 | break; |
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121 | } |
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1693 | palkovsky | 122 | if (code->cmds[i].dstarg && code->cmds[i].dstarg < 4) { |
123 | call->data.args[code->cmds[i].dstarg] = dstval; |
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124 | } |
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1281 | palkovsky | 125 | } |
126 | } |
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127 | |||
128 | static void code_free(irq_code_t *code) |
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129 | { |
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130 | if (code) { |
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131 | free(code->cmds); |
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132 | free(code); |
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133 | } |
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134 | } |
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135 | |||
136 | static irq_code_t * code_from_uspace(irq_code_t *ucode) |
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137 | { |
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138 | irq_code_t *code; |
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139 | irq_cmd_t *ucmds; |
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1288 | jermar | 140 | int rc; |
1281 | palkovsky | 141 | |
142 | code = malloc(sizeof(*code), 0); |
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1288 | jermar | 143 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
144 | if (rc != 0) { |
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145 | free(code); |
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146 | return NULL; |
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147 | } |
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1281 | palkovsky | 148 | |
149 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
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150 | free(code); |
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151 | return NULL; |
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152 | } |
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153 | ucmds = code->cmds; |
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154 | code->cmds = malloc(sizeof(code->cmds[0]) * (code->cmdcount), 0); |
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1288 | jermar | 155 | rc = copy_from_uspace(code->cmds, ucmds, sizeof(code->cmds[0]) * (code->cmdcount)); |
156 | if (rc != 0) { |
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157 | free(code->cmds); |
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158 | free(code); |
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159 | return NULL; |
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160 | } |
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1281 | palkovsky | 161 | |
162 | return code; |
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163 | } |
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164 | |||
165 | /** Unregister task from irq */ |
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166 | void ipc_irq_unregister(answerbox_t *box, int irq) |
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167 | { |
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168 | ipl_t ipl; |
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1595 | palkovsky | 169 | int mq = irq + IPC_IRQ_RESERVED_VIRTUAL; |
1281 | palkovsky | 170 | |
171 | ipl = interrupts_disable(); |
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1595 | palkovsky | 172 | spinlock_lock(&irq_conns[mq].lock); |
173 | if (irq_conns[mq].box == box) { |
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174 | irq_conns[mq].box = NULL; |
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175 | code_free(irq_conns[mq].code); |
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176 | irq_conns[mq].code = NULL; |
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1281 | palkovsky | 177 | } |
178 | |||
1595 | palkovsky | 179 | spinlock_unlock(&irq_conns[mq].lock); |
1281 | palkovsky | 180 | interrupts_restore(ipl); |
181 | } |
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182 | |||
183 | /** Register an answerbox as a receiving end of interrupts notifications */ |
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184 | int ipc_irq_register(answerbox_t *box, int irq, irq_code_t *ucode) |
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185 | { |
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186 | ipl_t ipl; |
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187 | irq_code_t *code; |
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1595 | palkovsky | 188 | int mq = irq + IPC_IRQ_RESERVED_VIRTUAL; |
1281 | palkovsky | 189 | |
190 | ASSERT(irq_conns); |
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191 | |||
192 | if (ucode) { |
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193 | code = code_from_uspace(ucode); |
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194 | if (!code) |
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195 | return EBADMEM; |
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196 | } else |
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197 | code = NULL; |
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198 | |||
199 | ipl = interrupts_disable(); |
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1595 | palkovsky | 200 | spinlock_lock(&irq_conns[mq].lock); |
1281 | palkovsky | 201 | |
1595 | palkovsky | 202 | if (irq_conns[mq].box) { |
203 | spinlock_unlock(&irq_conns[mq].lock); |
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1281 | palkovsky | 204 | interrupts_restore(ipl); |
205 | code_free(code); |
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206 | return EEXISTS; |
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207 | } |
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1595 | palkovsky | 208 | irq_conns[mq].box = box; |
209 | irq_conns[mq].code = code; |
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210 | atomic_set(&irq_conns[mq].counter, 0); |
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211 | spinlock_unlock(&irq_conns[mq].lock); |
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1281 | palkovsky | 212 | interrupts_restore(ipl); |
213 | |||
214 | return 0; |
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215 | } |
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216 | |||
1595 | palkovsky | 217 | /** Add call to proper answerbox queue |
218 | * |
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219 | * Assume irq_conns[mq].lock is locked */ |
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220 | static void send_call(int mq, call_t *call) |
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221 | { |
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222 | spinlock_lock(&irq_conns[mq].box->irq_lock); |
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223 | list_append(&call->link, &irq_conns[mq].box->irq_notifs); |
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224 | spinlock_unlock(&irq_conns[mq].box->irq_lock); |
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225 | |||
226 | waitq_wakeup(&irq_conns[mq].box->wq, 0); |
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227 | } |
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228 | |||
229 | /** Send notification message |
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230 | * |
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231 | */ |
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1693 | palkovsky | 232 | void ipc_irq_send_msg(int irq, __native a1, __native a2, __native a3) |
1595 | palkovsky | 233 | { |
234 | call_t *call; |
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235 | int mq = irq + IPC_IRQ_RESERVED_VIRTUAL; |
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236 | |||
237 | spinlock_lock(&irq_conns[mq].lock); |
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238 | |||
239 | if (irq_conns[mq].box) { |
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240 | call = ipc_call_alloc(FRAME_ATOMIC); |
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241 | if (!call) { |
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242 | spinlock_unlock(&irq_conns[mq].lock); |
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243 | return; |
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244 | } |
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245 | call->flags |= IPC_CALL_NOTIF; |
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1693 | palkovsky | 246 | IPC_SET_METHOD(call->data, irq); |
247 | IPC_SET_ARG1(call->data, a1); |
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1595 | palkovsky | 248 | IPC_SET_ARG2(call->data, a2); |
249 | IPC_SET_ARG3(call->data, a3); |
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1693 | palkovsky | 250 | /* Put a counter to the message */ |
251 | call->private = atomic_preinc(&irq_conns[mq].counter); |
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1595 | palkovsky | 252 | |
253 | send_call(mq, call); |
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254 | } |
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255 | spinlock_unlock(&irq_conns[mq].lock); |
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256 | } |
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257 | |||
1281 | palkovsky | 258 | /** Notify process that an irq had happend |
259 | * |
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260 | * We expect interrupts to be disabled |
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261 | */ |
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262 | void ipc_irq_send_notif(int irq) |
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263 | { |
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264 | call_t *call; |
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1595 | palkovsky | 265 | int mq = irq + IPC_IRQ_RESERVED_VIRTUAL; |
1281 | palkovsky | 266 | |
267 | ASSERT(irq_conns); |
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1595 | palkovsky | 268 | spinlock_lock(&irq_conns[mq].lock); |
1281 | palkovsky | 269 | |
1595 | palkovsky | 270 | if (irq_conns[mq].box) { |
1281 | palkovsky | 271 | call = ipc_call_alloc(FRAME_ATOMIC); |
1591 | palkovsky | 272 | if (!call) { |
1595 | palkovsky | 273 | spinlock_unlock(&irq_conns[mq].lock); |
1591 | palkovsky | 274 | return; |
275 | } |
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1281 | palkovsky | 276 | call->flags |= IPC_CALL_NOTIF; |
1693 | palkovsky | 277 | /* Put a counter to the message */ |
278 | call->private = atomic_preinc(&irq_conns[mq].counter); |
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279 | /* Set up args */ |
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280 | IPC_SET_METHOD(call->data, irq); |
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1281 | palkovsky | 281 | |
282 | /* Execute code to handle irq */ |
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1595 | palkovsky | 283 | code_execute(call, irq_conns[mq].code); |
284 | |||
285 | send_call(mq, call); |
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1281 | palkovsky | 286 | } |
287 | |||
1595 | palkovsky | 288 | spinlock_unlock(&irq_conns[mq].lock); |
1281 | palkovsky | 289 | } |
290 | |||
291 | |||
1595 | palkovsky | 292 | /** Initialize table of interrupt handlers |
293 | * |
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294 | * @param irqcount Count of required hardware IRQs to be supported |
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295 | */ |
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1281 | palkovsky | 296 | void ipc_irq_make_table(int irqcount) |
297 | { |
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298 | int i; |
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299 | |||
1595 | palkovsky | 300 | irqcount += IPC_IRQ_RESERVED_VIRTUAL; |
301 | |||
1281 | palkovsky | 302 | irq_conns_size = irqcount; |
303 | irq_conns = malloc(irqcount * (sizeof(*irq_conns)), 0); |
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304 | for (i=0; i < irqcount; i++) { |
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305 | spinlock_initialize(&irq_conns[i].lock, "irq_ipc_lock"); |
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306 | irq_conns[i].box = NULL; |
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307 | irq_conns[i].code = NULL; |
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308 | } |
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309 | } |
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310 | |||
311 | /** Disconnect all irq's notifications |
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312 | * |
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313 | * TODO: It may be better to do some linked list, so that |
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314 | * we wouldn't need to go through whole array every cleanup |
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315 | */ |
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316 | void ipc_irq_cleanup(answerbox_t *box) |
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317 | { |
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318 | int i; |
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319 | ipl_t ipl; |
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320 | |||
321 | for (i=0; i < irq_conns_size; i++) { |
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322 | ipl = interrupts_disable(); |
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323 | spinlock_lock(&irq_conns[i].lock); |
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324 | if (irq_conns[i].box == box) |
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325 | irq_conns[i].box = NULL; |
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326 | spinlock_unlock(&irq_conns[i].lock); |
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327 | interrupts_restore(ipl); |
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328 | } |
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329 | } |