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173 | jermar | 1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * |
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9 | * - Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * - Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * - The name of the author may not be used to endorse or promote products |
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15 | * derived from this software without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | */ |
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28 | |||
29 | #ifndef __ia64_ASM_H__ |
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30 | #define __ia64_ASM_H__ |
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31 | |||
747 | jermar | 32 | #include <config.h> |
173 | jermar | 33 | #include <arch/types.h> |
432 | jermar | 34 | #include <arch/register.h> |
173 | jermar | 35 | |
180 | jermar | 36 | /** Return base address of current stack |
37 | * |
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38 | * Return the base address of the current stack. |
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39 | * The stack is assumed to be STACK_SIZE long. |
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40 | * The stack must start on page boundary. |
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41 | */ |
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173 | jermar | 42 | static inline __address get_stack_base(void) |
43 | { |
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180 | jermar | 44 | __u64 v; |
45 | |||
46 | __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1))); |
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47 | |||
48 | return v; |
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173 | jermar | 49 | } |
50 | |||
919 | jermar | 51 | /** Return Processor State Register. |
52 | * |
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53 | * @return PSR. |
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54 | */ |
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55 | static inline __u64 psr_read(void) |
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56 | { |
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57 | __u64 v; |
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58 | |||
59 | __asm__ volatile ("mov %0 = psr\n" : "=r" (v)); |
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60 | |||
61 | return v; |
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62 | } |
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63 | |||
470 | jermar | 64 | /** Read IVA (Interruption Vector Address). |
65 | * |
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66 | * @return Return location of interruption vector table. |
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67 | */ |
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68 | static inline __u64 iva_read(void) |
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69 | { |
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70 | __u64 v; |
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71 | |||
72 | __asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v)); |
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73 | |||
74 | return v; |
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75 | } |
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76 | |||
77 | /** Write IVA (Interruption Vector Address) register. |
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78 | * |
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79 | * @param New location of interruption vector table. |
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80 | */ |
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81 | static inline void iva_write(__u64 v) |
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82 | { |
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83 | __asm__ volatile ("mov cr.iva = %0\n" : : "r" (v)); |
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84 | } |
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85 | |||
86 | |||
432 | jermar | 87 | /** Read IVR (External Interrupt Vector Register). |
431 | jermar | 88 | * |
89 | * @return Highest priority, pending, unmasked external interrupt vector. |
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90 | */ |
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432 | jermar | 91 | static inline __u64 ivr_read(void) |
431 | jermar | 92 | { |
93 | __u64 v; |
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94 | |||
432 | jermar | 95 | __asm__ volatile ("mov %0 = cr.ivr\n" : "=r" (v)); |
431 | jermar | 96 | |
432 | jermar | 97 | return v; |
431 | jermar | 98 | } |
195 | vana | 99 | |
432 | jermar | 100 | /** Write ITC (Interval Timer Counter) register. |
101 | * |
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102 | * @param New counter value. |
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103 | */ |
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104 | static inline void itc_write(__u64 v) |
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105 | { |
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106 | __asm__ volatile ("mov ar.itc = %0\n" : : "r" (v)); |
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107 | } |
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431 | jermar | 108 | |
432 | jermar | 109 | /** Read ITC (Interval Timer Counter) register. |
110 | * |
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111 | * @return Current counter value. |
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112 | */ |
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113 | static inline __u64 itc_read(void) |
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114 | { |
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115 | __u64 v; |
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116 | |||
117 | __asm__ volatile ("mov %0 = ar.itc\n" : "=r" (v)); |
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118 | |||
119 | return v; |
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120 | } |
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195 | vana | 121 | |
432 | jermar | 122 | /** Write ITM (Interval Timer Match) register. |
123 | * |
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124 | * @param New match value. |
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125 | */ |
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126 | static inline void itm_write(__u64 v) |
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127 | { |
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128 | __asm__ volatile ("mov cr.itm = %0\n" : : "r" (v)); |
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129 | } |
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195 | vana | 130 | |
1488 | vana | 131 | /** Read ITM (Interval Timer Match) register. |
132 | * |
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133 | * @return Match value. |
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134 | */ |
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135 | static inline __u64 itm_read(void) |
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136 | { |
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137 | __u64 v; |
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138 | |||
139 | __asm__ volatile ("mov %0 = cr.itm\n" : "=r" (v)); |
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140 | |||
141 | return v; |
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142 | } |
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143 | |||
433 | jermar | 144 | /** Read ITV (Interval Timer Vector) register. |
145 | * |
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146 | * @return Current vector and mask bit. |
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147 | */ |
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148 | static inline __u64 itv_read(void) |
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149 | { |
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150 | __u64 v; |
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151 | |||
152 | __asm__ volatile ("mov %0 = cr.itv\n" : "=r" (v)); |
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153 | |||
154 | return v; |
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155 | } |
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156 | |||
432 | jermar | 157 | /** Write ITV (Interval Timer Vector) register. |
158 | * |
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433 | jermar | 159 | * @param New vector and mask bit. |
432 | jermar | 160 | */ |
161 | static inline void itv_write(__u64 v) |
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162 | { |
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163 | __asm__ volatile ("mov cr.itv = %0\n" : : "r" (v)); |
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164 | } |
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238 | vana | 165 | |
432 | jermar | 166 | /** Write EOI (End Of Interrupt) register. |
167 | * |
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168 | * @param This value is ignored. |
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169 | */ |
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170 | static inline void eoi_write(__u64 v) |
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171 | { |
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172 | __asm__ volatile ("mov cr.eoi = %0\n" : : "r" (v)); |
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173 | } |
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174 | |||
175 | /** Read TPR (Task Priority Register). |
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176 | * |
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177 | * @return Current value of TPR. |
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178 | */ |
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179 | static inline __u64 tpr_read(void) |
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180 | { |
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181 | __u64 v; |
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182 | |||
183 | __asm__ volatile ("mov %0 = cr.tpr\n" : "=r" (v)); |
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184 | |||
185 | return v; |
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186 | } |
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187 | |||
188 | /** Write TPR (Task Priority Register). |
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189 | * |
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190 | * @param New value of TPR. |
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191 | */ |
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192 | static inline void tpr_write(__u64 v) |
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193 | { |
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194 | __asm__ volatile ("mov cr.tpr = %0\n" : : "r" (v)); |
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195 | } |
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196 | |||
197 | /** Disable interrupts. |
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198 | * |
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199 | * Disable interrupts and return previous |
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200 | * value of PSR. |
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201 | * |
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202 | * @return Old interrupt priority level. |
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203 | */ |
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204 | static ipl_t interrupts_disable(void) |
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205 | { |
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206 | __u64 v; |
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207 | |||
208 | __asm__ volatile ( |
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209 | "mov %0 = psr\n" |
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210 | "rsm %1\n" |
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211 | : "=r" (v) |
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212 | : "i" (PSR_I_MASK) |
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213 | ); |
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214 | |||
215 | return (ipl_t) v; |
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216 | } |
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217 | |||
218 | /** Enable interrupts. |
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219 | * |
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220 | * Enable interrupts and return previous |
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221 | * value of PSR. |
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222 | * |
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223 | * @return Old interrupt priority level. |
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224 | */ |
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225 | static ipl_t interrupts_enable(void) |
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226 | { |
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227 | __u64 v; |
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228 | |||
229 | __asm__ volatile ( |
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230 | "mov %0 = psr\n" |
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231 | "ssm %1\n" |
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232 | ";;\n" |
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233 | "srlz.d\n" |
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234 | : "=r" (v) |
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235 | : "i" (PSR_I_MASK) |
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236 | ); |
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237 | |||
238 | return (ipl_t) v; |
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239 | } |
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240 | |||
241 | /** Restore interrupt priority level. |
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242 | * |
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243 | * Restore PSR. |
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244 | * |
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245 | * @param ipl Saved interrupt priority level. |
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246 | */ |
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247 | static inline void interrupts_restore(ipl_t ipl) |
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248 | { |
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472 | jermar | 249 | if (ipl & PSR_I_MASK) |
250 | (void) interrupts_enable(); |
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251 | else |
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252 | (void) interrupts_disable(); |
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432 | jermar | 253 | } |
254 | |||
255 | /** Return interrupt priority level. |
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256 | * |
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257 | * @return PSR. |
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258 | */ |
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259 | static inline ipl_t interrupts_read(void) |
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260 | { |
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919 | jermar | 261 | return (ipl_t) psr_read(); |
432 | jermar | 262 | } |
263 | |||
746 | jermar | 264 | /** Disable protection key checking. */ |
265 | static inline void pk_disable(void) |
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266 | { |
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267 | __asm__ volatile ("rsm %0\n" : : "i" (PSR_PK_MASK)); |
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268 | } |
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269 | |||
432 | jermar | 270 | extern void cpu_halt(void); |
271 | extern void cpu_sleep(void); |
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272 | extern void asm_delay_loop(__u32 t); |
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238 | vana | 273 | |
1078 | jermar | 274 | extern void switch_to_userspace(__address entry, __address sp, __address bsp, __address uspace_uarg, __u64 ipsr, __u64 rsc); |
919 | jermar | 275 | |
173 | jermar | 276 | #endif |