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308 | jermar | 1 | # |
319 | jermar | 2 | # Copyright (C) 2003-2004 Jakub Jermar |
1 | jermar | 3 | # All rights reserved. |
4 | # |
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5 | # Redistribution and use in source and binary forms, with or without |
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6 | # modification, are permitted provided that the following conditions |
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7 | # are met: |
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8 | # |
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9 | # - Redistributions of source code must retain the above copyright |
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10 | # notice, this list of conditions and the following disclaimer. |
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11 | # - Redistributions in binary form must reproduce the above copyright |
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12 | # notice, this list of conditions and the following disclaimer in the |
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13 | # documentation and/or other materials provided with the distribution. |
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14 | # - The name of the author may not be used to endorse or promote products |
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15 | # derived from this software without specific prior written permission. |
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16 | # |
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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27 | # |
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28 | |||
306 | palkovsky | 29 | #include <arch/asm/regname.h> |
30 | #include <arch/mm/page.h> |
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31 | #include <arch/asm/boot.h> |
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317 | palkovsky | 32 | #include <arch/context_offset.h> |
306 | palkovsky | 33 | |
1 | jermar | 34 | .text |
35 | |||
36 | .set noat |
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37 | .set noreorder |
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38 | .set nomacro |
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39 | |||
40 | .global kernel_image_start |
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41 | .global tlb_refill_entry |
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42 | .global cache_error_entry |
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43 | .global exception_entry |
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313 | palkovsky | 44 | .global userspace_asm |
1 | jermar | 45 | |
1096 | palkovsky | 46 | # Which status bits should are thread-local |
47 | #define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE |
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48 | |||
313 | palkovsky | 49 | # Save registers to space defined by \r |
1096 | palkovsky | 50 | # We will change status: Disable ERL,EXL,UM,IE |
51 | # These changes will be automatically reversed in REGISTER_LOAD |
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1102 | palkovsky | 52 | # SP is NOT saved as part of these registers |
1096 | palkovsky | 53 | .macro REGISTERS_STORE_AND_EXC_RESET r |
306 | palkovsky | 54 | sw $at,EOFFSET_AT(\r) |
55 | sw $v0,EOFFSET_V0(\r) |
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56 | sw $v1,EOFFSET_V1(\r) |
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57 | sw $a0,EOFFSET_A0(\r) |
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58 | sw $a1,EOFFSET_A1(\r) |
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59 | sw $a2,EOFFSET_A2(\r) |
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60 | sw $a3,EOFFSET_A3(\r) |
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317 | palkovsky | 61 | sw $t0,EOFFSET_T0(\r) |
306 | palkovsky | 62 | sw $t1,EOFFSET_T1(\r) |
63 | sw $t2,EOFFSET_T2(\r) |
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64 | sw $t3,EOFFSET_T3(\r) |
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65 | sw $t4,EOFFSET_T4(\r) |
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66 | sw $t5,EOFFSET_T5(\r) |
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67 | sw $t6,EOFFSET_T6(\r) |
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68 | sw $t7,EOFFSET_T7(\r) |
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69 | sw $t8,EOFFSET_T8(\r) |
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70 | sw $t9,EOFFSET_T9(\r) |
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313 | palkovsky | 71 | |
72 | mflo $at |
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73 | sw $at, EOFFSET_LO(\r) |
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74 | mfhi $at |
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75 | sw $at, EOFFSET_HI(\r) |
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76 | |||
1094 | palkovsky | 77 | #ifdef CONFIG_DEBUG_ALLREGS |
306 | palkovsky | 78 | sw $s0,EOFFSET_S0(\r) |
79 | sw $s1,EOFFSET_S1(\r) |
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80 | sw $s2,EOFFSET_S2(\r) |
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81 | sw $s3,EOFFSET_S3(\r) |
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82 | sw $s4,EOFFSET_S4(\r) |
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83 | sw $s5,EOFFSET_S5(\r) |
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84 | sw $s6,EOFFSET_S6(\r) |
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85 | sw $s7,EOFFSET_S7(\r) |
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1094 | palkovsky | 86 | sw $s8,EOFFSET_S8(\r) |
87 | #endif |
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88 | |||
306 | palkovsky | 89 | sw $gp,EOFFSET_GP(\r) |
90 | sw $ra,EOFFSET_RA(\r) |
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1102 | palkovsky | 91 | sw $k1,EOFFSET_K1(\r) |
313 | palkovsky | 92 | |
1096 | palkovsky | 93 | mfc0 $t0, $status |
94 | mfc0 $t1, $epc |
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95 | |||
96 | and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE |
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97 | li $t3, ~(0x1f) |
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98 | and $t0, $t0, $t3 # Clear KSU,EXL,ERL,IE |
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99 | |||
100 | sw $t2,EOFFSET_STATUS(\r) |
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101 | sw $t1,EOFFSET_EPC(\r) |
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102 | mtc0 $t0, $status |
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306 | palkovsky | 103 | .endm |
104 | |||
105 | .macro REGISTERS_LOAD r |
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1096 | palkovsky | 106 | # Update only UM,EXR,IE from status, the rest |
107 | # is controlled by OS and not bound to task |
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108 | mfc0 $t0, $status |
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109 | lw $t1,EOFFSET_STATUS(\r) |
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110 | |||
111 | li $t2, ~REG_SAVE_MASK # Mask UM,EXL,ERL,IE |
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112 | and $t0, $t0, $t2 |
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113 | |||
114 | or $t0, $t0, $t1 # Copy UM,EXL,ERL,IE from saved status |
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115 | mtc0 $t0, $status |
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116 | |||
306 | palkovsky | 117 | lw $v0,EOFFSET_V0(\r) |
118 | lw $v1,EOFFSET_V1(\r) |
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119 | lw $a0,EOFFSET_A0(\r) |
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120 | lw $a1,EOFFSET_A1(\r) |
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121 | lw $a2,EOFFSET_A2(\r) |
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122 | lw $a3,EOFFSET_A3(\r) |
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317 | palkovsky | 123 | lw $t0,EOFFSET_T0(\r) |
306 | palkovsky | 124 | lw $t1,EOFFSET_T1(\r) |
125 | lw $t2,EOFFSET_T2(\r) |
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126 | lw $t3,EOFFSET_T3(\r) |
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127 | lw $t4,EOFFSET_T4(\r) |
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128 | lw $t5,EOFFSET_T5(\r) |
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129 | lw $t6,EOFFSET_T6(\r) |
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130 | lw $t7,EOFFSET_T7(\r) |
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131 | lw $t8,EOFFSET_T8(\r) |
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132 | lw $t9,EOFFSET_T9(\r) |
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1094 | palkovsky | 133 | |
134 | #ifdef CONFIG_DEBUG_ALLREGS |
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306 | palkovsky | 135 | lw $s0,EOFFSET_S0(\r) |
136 | lw $s1,EOFFSET_S1(\r) |
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137 | lw $s2,EOFFSET_S2(\r) |
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138 | lw $s3,EOFFSET_S3(\r) |
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139 | lw $s4,EOFFSET_S4(\r) |
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140 | lw $s5,EOFFSET_S5(\r) |
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141 | lw $s6,EOFFSET_S6(\r) |
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142 | lw $s7,EOFFSET_S7(\r) |
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143 | lw $s8,EOFFSET_S8(\r) |
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1094 | palkovsky | 144 | #endif |
306 | palkovsky | 145 | lw $gp,EOFFSET_GP(\r) |
146 | lw $ra,EOFFSET_RA(\r) |
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1102 | palkovsky | 147 | lw $k1,EOFFSET_K1(\r) |
306 | palkovsky | 148 | |
313 | palkovsky | 149 | lw $at,EOFFSET_LO(\r) |
150 | mtlo $at |
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151 | lw $at,EOFFSET_HI(\r) |
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152 | mthi $at |
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153 | |||
317 | palkovsky | 154 | lw $at,EOFFSET_EPC(\r) |
155 | mtc0 $at, $epc |
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313 | palkovsky | 156 | |
157 | lw $at,EOFFSET_AT(\r) |
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158 | lw $sp,EOFFSET_SP(\r) |
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306 | palkovsky | 159 | .endm |
160 | |||
313 | palkovsky | 161 | # Move kernel stack pointer address to register K0 |
162 | # - if we are in user mode, load the appropriate stack |
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163 | # address |
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164 | .macro KERNEL_STACK_TO_K0 |
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165 | # If we are in user mode |
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166 | mfc0 $k0, $status |
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167 | andi $k0, 0x10 |
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306 | palkovsky | 168 | |
313 | palkovsky | 169 | beq $k0, $0, 1f |
170 | add $k0, $sp, 0 |
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171 | |||
172 | # Move $k0 pointer to kernel stack |
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173 | lui $k0, %hi(supervisor_sp) |
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320 | palkovsky | 174 | ori $k0, $k0, %lo(supervisor_sp) |
313 | palkovsky | 175 | # Move $k0 (superveisor_sp) |
176 | lw $k0, 0($k0) |
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177 | 1: |
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178 | .endm |
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179 | |||
1 | jermar | 180 | .org 0x0 |
306 | palkovsky | 181 | kernel_image_start: |
182 | /* Load temporary stack */ |
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313 | palkovsky | 183 | lui $sp, %hi(end_stack) |
320 | palkovsky | 184 | ori $sp, $sp, %lo(end_stack) |
306 | palkovsky | 185 | |
186 | /* Not sure about this, but might be needed for PIC code???? */ |
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187 | lui $gp, 0x8000 |
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188 | |||
1222 | decky | 189 | jal arch_pre_main |
306 | palkovsky | 190 | nop |
1222 | decky | 191 | |
192 | j main_bsp |
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193 | nop |
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306 | palkovsky | 194 | |
195 | .space TEMP_STACK_SIZE |
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326 | palkovsky | 196 | end_stack: |
197 | |||
198 | tlb_refill_entry: |
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199 | j tlb_refill_handler |
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200 | nop |
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201 | |||
202 | cache_error_entry: |
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203 | j cache_error_handler |
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204 | nop |
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205 | |||
206 | exception_entry: |
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207 | j exception_handler |
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208 | nop |
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209 | |||
306 | palkovsky | 210 | |
326 | palkovsky | 211 | |
313 | palkovsky | 212 | exception_handler: |
213 | KERNEL_STACK_TO_K0 |
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214 | sub $k0, REGISTER_SPACE |
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1102 | palkovsky | 215 | sw $sp,EOFFSET_SP($k0) |
216 | move $sp, $k0 |
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1096 | palkovsky | 217 | |
1102 | palkovsky | 218 | mfc0 $k0, $cause |
1096 | palkovsky | 219 | |
1102 | palkovsky | 220 | sra $k0, $k0, 0x2 # cp0_exc_cause() part 1 |
221 | andi $k0, $k0, 0x1f # cp0_exc_cause() part 2 |
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222 | sub $k0, 8 # 8=SYSCALL |
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1096 | palkovsky | 223 | |
1102 | palkovsky | 224 | beqz $k0, syscall_shortcut |
1386 | palkovsky | 225 | add $k0, 8 # Revert $k0 back to correct exc number |
1096 | palkovsky | 226 | |
1102 | palkovsky | 227 | REGISTERS_STORE_AND_EXC_RESET $sp |
228 | |||
1096 | palkovsky | 229 | move $a1, $sp |
230 | jal exc_dispatch # exc_dispatch(excno, register_space) |
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1102 | palkovsky | 231 | move $a0, $k0 |
313 | palkovsky | 232 | |
233 | REGISTERS_LOAD $sp |
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234 | # The $sp is automatically restored to former value |
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235 | eret |
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1096 | palkovsky | 236 | |
237 | # it seems that mips reserves some space on stack for varfuncs??? |
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238 | #define SS_ARG4 16 |
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1102 | palkovsky | 239 | #define SS_SP EOFFSET_SP |
240 | #define SS_STATUS EOFFSET_STATUS |
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241 | #define SS_EPC EOFFSET_EPC |
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1386 | palkovsky | 242 | #define SS_K1 EOFFSET_K1 |
1100 | palkovsky | 243 | syscall_shortcut: |
1096 | palkovsky | 244 | # We have a lot of space on the stack, with free use |
245 | mfc0 $t1, $epc |
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246 | mfc0 $t0, $status |
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247 | sw $t1,SS_EPC($sp) # Save EPC |
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1386 | palkovsky | 248 | sw $k1,SS_K1($sp) # Save k1, which is not saved during context switch |
313 | palkovsky | 249 | |
1096 | palkovsky | 250 | and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE |
251 | li $t3, ~(0x1f) |
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252 | and $t0, $t0, $t3 # Clear KSU,EXL,ERL |
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253 | ori $t0, $t0, 0x1 # Set IE |
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254 | |||
255 | sw $t2,SS_STATUS($sp) |
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256 | mtc0 $t0, $status |
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257 | |||
1126 | palkovsky | 258 | # CALL Syscall handler |
1096 | palkovsky | 259 | jal syscall_handler |
260 | sw $v0, SS_ARG4($sp) # save v0 - arg4 to stack |
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261 | |||
262 | # restore status |
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263 | mfc0 $t0, $status |
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264 | lw $t1,SS_STATUS($sp) |
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265 | |||
1126 | palkovsky | 266 | # Change back to EXL=1(from last exception), otherwise |
267 | # an interrupt could rewrite the CP0-EPC |
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1096 | palkovsky | 268 | li $t2, ~REG_SAVE_MASK # Mask UM,EXL,ERL,IE |
269 | and $t0, $t0, $t2 |
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270 | or $t0, $t0, $t1 # Copy UM,EXL,ERL,IE from saved status |
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271 | mtc0 $t0, $status |
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272 | |||
1126 | palkovsky | 273 | # restore epc+4 |
274 | lw $t0,SS_EPC($sp) |
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1386 | palkovsky | 275 | lw $k1,SS_K1($sp) |
1126 | palkovsky | 276 | addi $t0, $t0, 4 |
277 | mtc0 $t0, $epc |
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278 | |||
1096 | palkovsky | 279 | lw $sp,SS_SP($sp) # restore sp |
280 | |||
281 | eret |
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1278 | palkovsky | 282 | |
1 | jermar | 283 | tlb_refill_handler: |
313 | palkovsky | 284 | KERNEL_STACK_TO_K0 |
285 | sub $k0, REGISTER_SPACE |
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1096 | palkovsky | 286 | REGISTERS_STORE_AND_EXC_RESET $k0 |
1102 | palkovsky | 287 | sw $sp,EOFFSET_SP($k0) |
313 | palkovsky | 288 | add $sp, $k0, 0 |
125 | jermar | 289 | |
1293 | palkovsky | 290 | jal tlb_refill /* tlb_refill(register_space) */ |
317 | palkovsky | 291 | add $a0, $sp, 0 |
125 | jermar | 292 | |
306 | palkovsky | 293 | REGISTERS_LOAD $sp |
125 | jermar | 294 | |
50 | jermar | 295 | eret |
1 | jermar | 296 | |
297 | cache_error_handler: |
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313 | palkovsky | 298 | KERNEL_STACK_TO_K0 |
1102 | palkovsky | 299 | sub $k0, REGISTER_SPACE |
300 | REGISTERS_STORE_AND_EXC_RESET $k0 |
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301 | sw $sp,EOFFSET_SP($k0) |
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313 | palkovsky | 302 | add $sp, $k0, 0 |
1 | jermar | 303 | |
50 | jermar | 304 | jal cache_error |
305 | nop |
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125 | jermar | 306 | |
306 | palkovsky | 307 | REGISTERS_LOAD $sp |
1 | jermar | 308 | |
50 | jermar | 309 | eret |
313 | palkovsky | 310 | |
311 | userspace_asm: |
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312 | add $sp, $a0, 0 |
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1122 | palkovsky | 313 | add $v0, $a1, 0 |
314 | add $t9, $a2, 0 # Set up correct entry into PIC code |
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313 | palkovsky | 315 | eret |